[1] Kim D, Alamo J. 30-nm InAs PHEMTs With fT = 644 GHz and fmax = 681 GHz[J]. IEEE Electron Device Letters, 31, 806-808(2010).

[2] Lai R, Mei X B, Deal W R et al. Sub 50 nm InP HEMT Device with fmax Greater than 1 THz[C], 609-611(2007).

[3] Deal W R, Leong K, Zamora A., Radisic V et al. Recent progress in scaling InP HEMT TMIC technology to 850 GHz[C], 2014, 1-3.

[4] Park W, Jo H, Kim H et al. Terahertz In0.8Ga0.2As quantum-well HEMTs toward 6G applications[C], 11.4.1-11.4.4(2022).

[5] Mei X B, Yoshida W, Lange M et al. First Demonstration of Amplification at 1 THz Using 25-nm InP High Electron Mobility Transistor Process[J]. IEEE Electron Device Letters, 36, 327-329(2015).

[6] Jo H, Yun S, Kim J et al. Sub-30-nm In0.8Ga0.2As Composite-Channel High-Electron-Mobility Transistors With Record High-Frequency Characteristics[J]. IEEE Transactions on Electron Devices, 68, 2010-2016(2021).

[7] Chen K J, Enoki T, Maezawa K et al. High-performance InP-based enhancement-mode HEMTs using non-alloyed ohmic contacts and Pt-based buried-gate technologies[J]. IEEE Transactions on Electron Devices, 43, 252-257(1996).

[8] Shinohara K, Yamashita Y, Endoh A et al. 547 GHz fT In0.7Ga0.3As-In0.52Al0.48As HEMTs with reduced source and drain resistance[J]. IEEE Electron Device Letters, 25, 241-243(2004).

[9] Feng Ruize, Wang Bo, Cao Shurui et al. Impact of symmetric gate-recess length on the DC and RF characteristics of InP HEMTs[J]. Chinese Physics B, 31, 018505(2022).

[10] Takahashi T, Makiyama K, Hara N et al. Improvement in high frequency and noise characteristics of InP-based HEMTs by reducing parasitic capacitance[C], 1-4(2008).

[11] Kim D, Alamo J, Lee J et al. The Impact of Side-Recess Spacing on the Logic Performance of 50 nm InGaAs HEMTs[C], 177-180(2006).

[12] Samnouni M, Wichmann N, Wallart X et al. 75 nm Gate Length PHEMT With fmax = 800 GHz Using Asymmetric Gate Recess: RF and Noise Investigation[J]. IEEE Transactions on Electron Devices, 68, 4289-4295(2021).

[13] Shinohara K, Chen P S, Bergman J et al. Ultra-High-Speed Low-Noise InP-HEMT Technology[C], 337-340(2006).

[14] Suemitsu T, Yokoyama H, Umeda Y et al. High-performance 0.1-µm-gate enhancement-mode InAlAs/InGaAs HEMT’s using two-step-recessed gate technology[J]. IEEE Transactions on Electron Devices, 46, 1074-1080(1999).

[15] Kim T, Kim D, Park S et al. A Two-Step-Recess Process Based on Atomic-Layer Etching for High-Performance In0.52Al0.48As/In0.53Ga0.47As p-HEMTs[J]. IEEE Transactions on Electron Devices, 55, 1577-1584(2008).

[16] Ding Peng, Chen Chen, Ding Wuchang et al. Ultra-thin 20 nm-PECVD-Si3N4 surface passivation in T-shaped gate InAlAs/InGaAs InP-based HEMTs and its impact on DC and RF performance[J]. Solid-State Electronics, 123, 1-5(2016).

[17] Dambrine G, Cappy A, Heliodore F et al. A new method for determining the FET small-signal equivalent circuit[J]. IEEE Transactions on Microwave Theory and Techniques, 36, 1151-1159(1988).

[18] Asif M, Peng D, Chen C et al. Analysis of Passivation Techniques in InP HEMTs and Implementation of an Analytical Model of fT Based on the Small Signal Equivalent Circuit[J]. Journal of Nanoscience and Nanotechnology, 19, 2537-2546(2019).

[19] Takahashi T, Kawano Y, Makiyama K et al. Enhancement of fmax to 910 GHz by Adopting Asymmetric Gate Recess and Double-Side-Doped Structure in 75-nm-Gate InAlAs/InGaAs HEMTs[J]. IEEE Transactions on Electron Devices, 64, 89-95(2017).

[20] Zhou Guo, Bi Yingsheng, Chen Zhuo et al. Preparation and Performances of InP HEMT Device with Cavity Gate Structure[J]. Semiconductor Technology.

[21] Zhang Lisen, Feng Zhihong, Xing Dong et al. 70 nm gate-length THz InP-based In0.7Ga0.3As/In0.52Al0.48As HEMT with fmax of 540 GHz[C], 1-4(2014).