Fig. 1. Schematic diagram of NCUC linear cascade network topology

Fig. 2. Schematic diagram of slave hardware

Fig. 3. Schematic diagram of functional structure of NCUC controller

Fig. 4. Definition of NCUC network frame structure

Fig. 5. Service data channel state transition model

Fig. 6. Transition model of process data channel state

Fig. 7. Transition model of FIFO channel state

Fig. 8. Working principle of channel mapping

Fig. 9. Schematic diagram of communication delay between two adjacent slave stations

Fig. 10. Transmission delay model of linear concatenated network

Fig. 11. Clock model

Fig. 12. Clock compensation model

Fig. 13. Typical fieldbus control system architecture

Fig. 14. Test results of NCUC ethernet bus communication cycle

Fig. 15. Test result of NCUC ethernet bus synchronization accuracy