Microelectronics, Volume. 52, Issue 6, 942(2022)

Design of a High Efficiency Power Amplifier Based on 40 nm CMOS Process

XU Leijun, MENG Shaowei, and BAI Xue
Author Affiliations
  • [in Chinese]
  • show less
    References(12)

    [1] [1] CHONG S S, CHAN P K. A sub-1 V transient-enhanced output-capacitorless LDO regulator with push-pull composite power transistor [J]. IEEE Trans Very Large Scale Integr Syst, 2014, 22(11): 2297-2306.

    [2] [2] LONG N, LE K, HANOI P N. An ultra-small capacitor-less LDO with controlled-resistance technique and MOSFET-only bandgap [C]// IEEE Int Conf Advan Technol Commun. 2015: 372-377.

    [3] [3] LEUNG K N, MOK P. A capacitor-free CMOS low-dropout regulator with damping-factor-control frequency compensation [J]. IEEE J Sol Sta Circ, 2003, 38(10): 1691-1702.

    [4] [4] CHIEN T H, CHEN C J, LI S T, et al. A fast transient flip voltage follower based low dropout regulator with AC-coupled pseudo tri-loop technique without using any output capacitor [C]// IEEE Appl Power Elec Conf Exposi. 2019: 1326-1330.

    [5] [5] PENG X, SANSEN W, HOU L, et al. Impedance adapting compensation for low-power multistage amplifiers [J]. IEEE J Sol Sta Circ, 2011, 46(2): 445-451.

    [6] [6] CAO H, YANG X, LI W, et al. An impedance adapting compensation scheme for high current NMOS LDO design [J]. IEEE Trans Circ Syst II: Expr Brie, 2021, 68(7): 2287-2291.

    [7] [7] MING X, LIANG H, ZHANG Z, et al. A high-efficiency and fast-transient low-dropout regulator with adaptive pole tracking frequency compensation technique [J]. IEEE Trans Power Elec, 2020, 35(11): 12401-12415.

    [8] [8] RINCóN-MORA G A. Analog IC design with low-dropout regulators (LDOs) [M]. New York: McGraw-Hill Education, 2009.

    [10] [10] WOO Y H, KAI H M, LEUNG K N. A full-load hybrid compensated LDO with output capacitance range of 0 to 1 μF [C]// IEEE Int Conf Elec Dev Sol Sta Circ. 2017: 1-2.

    [11] [11] MANIKANDAN P, BINDU B. A capacitor-less low-dropout regulator (LDO) architecture for wireless application [C]// IEEE Int Conf Nextgen Elec Technol Silicon to Software. 2017: 222-224.

    [13] [13] AL-SHYOUKH M, LEE H, PEREZ R. A transient-enhanced low-quiescent current low-dropout regulator with buffer impedance attenuation [J]. IEEE J Sol Sta Circ, 2007, 42(8): 1732-1742.

    [17] [17] MA H F, ZHOU F. Full on-chip and area-efficient CMOS LDO with zero to maximum load stability using adaptive frequency compensation [J]. J Semicond, 2010, 31(1): 73-78.

    Tools

    Get Citation

    Copy Citation Text

    XU Leijun, MENG Shaowei, BAI Xue. Design of a High Efficiency Power Amplifier Based on 40 nm CMOS Process[J]. Microelectronics, 2022, 52(6): 942

    Download Citation

    EndNote(RIS)BibTexPlain Text
    Save article for my favorites
    Paper Information

    Category:

    Received: Nov. 3, 2021

    Accepted: --

    Published Online: Mar. 11, 2023

    The Author Email:

    DOI:10.13911/j.cnki.1004-3365.210420

    Topics