Microprocessors, Volume. , Issue 3, 45(2025)

Design of a High-current DDR Power Supply Voltage Regulator Circuit

ZHANG Dan, SHANG Chuang, and DUAN Hao
Author Affiliations
  • The 47th Research Institute of China Electronics Technology Group Corporation, Shenyang 110032, China
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    References(5)

    [2] [2] ZHUO C, WILKE G, CHAKRABORTY R, et al. Silicon-Validated Power Delivery Modeling and Analysis on a 32-nm DDR I/O Interface[J]. IEEE Transactions on Very Large Scale Integration Systems, 2015, 23(9): 1760-1771.

    [3] [3] NASROLLAHPOUR M,HAMEDI-HAGH S,BASTAN Y,et al. ECP technique based capacitor-less LDO with high PSRR at low frequencies,−89 dB PSRR at 1MHz and enhanced transient response[C]. 2017 14th Internation al Conference on Synthesis,Modeling,Analysis and Simulation Methods and Applications to Circuit Design(SMACD),2017: 1-4.

    [4] [4] BELN, MEDRANO N. A Fully-Integrated 180 nm CMOS 1.2 V Low-Dropout Regulator for Low-Power Portable Applications[J]. Electronics, 2021, 10(17): 2108.

    [6] [6] MONTALVO-GALICIA F, DIAZ-ARANGO G,VENTURA-ARIZMENDI C,et al. Comparison of two internal miller compensation techniques for LDO regulators[C]. 2019 16th International Conference on Electrical Engineering, Computing Science and Automatic Control(CCE), 2019: 1-4.

    [9] [9] DEAN W. Source and Sink Voltage Regulator for Terminators: US, US5608312[P]. Mar 4, 1997.

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    ZHANG Dan, SHANG Chuang, DUAN Hao. Design of a High-current DDR Power Supply Voltage Regulator Circuit[J]. Microprocessors, 2025, (3): 45

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    Paper Information

    Received: Dec. 4, 2024

    Accepted: Aug. 25, 2025

    Published Online: Aug. 25, 2025

    The Author Email:

    DOI:10.3969/j.issn.1002-2279.2025.03.008

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