With the rapid development of memory technology, the operating voltage of double data rate synchronous dynamic random memory （DDR） is getting lower and lower. In order to meet the power supply requirements of DDR, a linear regulator with both source and sink current capabilities has been designed，which is compatible with DDR1~DDR4 power supply systems and other power supply system requirements. This chip utilizes the characteristics of dual power supply voltage to reduce static power consumption. The input voltage range of the power supply is 2.5V to 3.3V, and the LDO power supply voltage is adjustable from 1.2V to 2.5V according to the power supply requirements of DDR1~DDR4. This design uses a dual-loop regulator to achieve source and sink currents, and the output voltage is adjustable externally by the application. A low-threshold NMOS push-pull output stage is used to achieve an output voltage of 0.6V，and a GM amplifier is added to support fast transient response. The chip was designed using a 0.35um BCD process，the regulator was simulated under different DDR power supply conditions. The output could follow the input. The static current at no load is approximately 440uA to 700uA. The transient response and stability were simulated under the DDR4 power supply condition. When the load current jumped from 0A to 3A，the output voltage fluctuation is about 50mV. The results show that the circuit meets the application requirements of DDR1 to DDR4.