[1] [1] ZHONG K,HE H,ZHU G. An ultra high-speed FFT processor [C]. International Symposium on Signals,Circuits and Systems,Bnagkok,2003:37-40.

[2] [2] BENZL A O,GRISIAL P C. A broadband FFT spectrometer for radio and millimeter astronomy [J]. Astronomy & Astrophysics,2005,442(2):767-773.

[3] [3] BASS B M. An approach to low power,high performance,fast Fourier transform processor design [D]. Stanford University,1999.

[4] [4] HE S,TORKELSON M. Design and implementation of a 1024-point pipeline FFT processor [C]. Processing IEEE Custom Integrated Circuits Conference,1998:131-134.

[5] [5] PENG Y. A parallel architecture for VLSI implementation of FFT processor [C]. Proceedings of ASIC,2003(2):748-751.

[6] [6] SIWORKS. Product Brief: ParallelN-Point FFT/IFFT Core [R]. SiWorks,Inc.,2003.

[7] [7] OPPENHEIM A V,SCHAFER R W,BUCK J R. Discrete-Time Signal Processing [M]. 2nd ed.Pearson Education,1999.

[8] [8] LUO Y D,CHEN H,WANG X J. Design and implementation of a processor for radar signal reconnaissance [J].Journal of Beijing Institute of Technology (Natural Science Edition),2008,28(4):352-355.(in Chinese)

[9] [9] QIAO SH SH,HEI Y,WU B,et al.. Finite word-length in implementation of a block floating-point FFT processor [J]. Journal of University of Electronic Science and Technology of China,2008,37(1):58-60.(in Chinese)

[10] [10] WANG Y Y,LEUKEN R,VEEN A J,et al.. DSP implementation for delay hopped transmitted reference system based on FPGA [J].Opt. Precision Eng.,2006,14(5):876-882.(in Chinese)

[11] [11] SONG Y J,XU T F,NI G Q,et al.. Low power image fusion system based on Virtex-4 FPGA [J].Opt. Precision Eng.,2007,15(6):935-940.(in Chinese)

[12] [12] Xilinx. Virtex-ⅡPlatform FPGA Handbook[M]. Xilinx,San Jose,CA,2004