Journal of Terahertz Science and Electronic Information Technology , Volume. 22, Issue 8, 878(2024)

Design of a broadband blocker-tolerant RF receiver based on CMOS

YANG Jingzhi1, WENG Zhenhao1, GAO Zhiqiang1、*, and WANG Cong2
Author Affiliations
  • 1[in Chinese]
  • 2[in Chinese]
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    References(10)

    [1] [1] WANG Chengxiang, HAIDER F, GAO Xiqi, et al. Cellular architecture and key technologies for 5G wireless communication networks[J]. IEEE Communications Magazine, 2014,52(2):122-130. doi:10.1109/MCOM.2014.6736752.

    [4] [4] OZGUN M T,ABDELHAMID A,DOGAN H. A low power receiver front-end design with tunable notch filter for TX leakage and blocker suppression[J]. IEEE Transactions on Circuits and Systems I: Regular Papers, 2019, 66(3): 1180-1191. doi: 10.1109/TCSI.2018.2879040.

    [8] [8] THOMAS C M, LARSON L E. A CMOS broadband distributed N-path tunable bandpass filter[J]. IEEE Microwave & Wireless Components Letters, 2014,24(8):542-544. doi:10.1109/LMWC.2014.2321254.

    [9] [9] LIN Zhicheng,MAK P L,MARTINS R P. 2.4 A 0.028 mm2 11 mW single-mixing blocker-tolerant receiver with double-RF Npath filtering,S11 centering, +13 dBm OB-IIP3 and 1.5-to-2.9 dB NF[C]// 2015 International Solid-State Circuits Conference:Digest of Technical Papers. San Francisco:IEEE RFIC Virtual Journal, 2015:1-3. doi:10.1109/ISSCC.2015.7062913.

    [10] [10] BORREMANS J, MANDAL G, GIANNINI V, et al. A 40 nm CMOS 0.4~6 GHz receiver resilient to out-of-band blockers[J].IEEE Journal of Solid-state Circuits, 2011,46(7):1659-1671. doi:10.1109/JSSC.2011.2144110.

    [11] [11] VAN LIEMPD B, BORREMANS J, MARTENS E, et al. A 0.9 V 0.4~6 GHz harmonic recombination SDR receiver in 28 nm CMOS with HR3/HR5 and IIP2 calibration[J]. IEEE Journal of Solid-State Circuits, 2014, 49(8): 1815-1826. doi: 10.1109/JSSC.2014.2321148.

    [12] [12] PURUSHOTHAMAN V K, KLUMPERINK E A M, PLOMPEN R, et al. Low-power high-linearity mixer―first receiver using implicit capacitive stacking with 3×voltage gain[J]. IEEE Journal of Solid-State Circuits, 2022, 57(1): 245-259. doi: 10.1109/ISSCC.2015.7062913.

    [13] [13] WANG Huan, WANG Zisong, HEYDARI P. 28.7 a wideband blocker-tolerant receiver with high-Q RF-input selectivity and<-80 dBm LO leakage[C]// 2019 International Solid-State Circuits Conference. San Francisco: IEEE, 2019: 450-452. doi:10.1109/ISSCC.2019.8662499.

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    [15] [15] HENZLER S, KOEPPE S. Design and application of power optimized high-speed CMOS frequency dividers[J] IEEE Transactions on Very Large Scale Integration, 2008,16(11):1513-1520. doi:10.1109/TVLSI.2008.2001136.

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    YANG Jingzhi, WENG Zhenhao, GAO Zhiqiang, WANG Cong. Design of a broadband blocker-tolerant RF receiver based on CMOS[J]. Journal of Terahertz Science and Electronic Information Technology , 2024, 22(8): 878

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    Paper Information

    Received: Jan. 12, 2023

    Accepted: --

    Published Online: Sep. 23, 2024

    The Author Email: GAO Zhiqiang (hzcai@szu.edu.cn.)

    DOI:10.11805/tkyda2023013

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