Semiconductor Optoelectronics, Volume. 46, Issue 2, 255(2025)
Simulation Study of Deep Trench Semi-Superjunction VDMOS Device
In this study, a deep trench (DT) semi-superjunction (SSJ) vertical double-diffused metal-oxide semiconductor (VDMOS) field-effect transistor was developed. Silvaco TCAD simulation software was used to simulate and investigate the electrical characteristics of the DT SSJ VDMOS, which were compared with that of the DT VDMOS and DT super-junction (SJ) VDMOS. The DT overcomes the limitation of the Gaussian law of the vertical electric field at the gate oxide interface, and reduces the peak electric field of the gate oxide layer. The introduction of the SSJ reduces process complexity and simultaneously improves device stability compared with those of the SJ structure. The simulation results show that the breakdown voltage (BV), specific on-resistance (Ron, sp), and figure of merit (FOM) of the DT SSJ VDMOS are 1 000 V, 26.78 mΩ· cm2, and 37.565 MW/cm2, respectively. The BV of the DT SSJ VDMOS device increased by 100%, and FOM by 57% compared to those of the DT VDMOS device. Furthermore, its Ron, sp was reduced by 35.9%, and FOM was increased by 5% compared with those of the DT SJ VDMOS device. By adopting DT and SSJ structures, the contradiction between the breakdown voltage and Ron, sp is resolved, and the overall performance of the device is improved.
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LI Yao, GOU Henglu, CHEN Lihuan, NIU Ruixia, CHEN Wenshu, LONG Yi, BAI Kailiang. Simulation Study of Deep Trench Semi-Superjunction VDMOS Device[J]. Semiconductor Optoelectronics, 2025, 46(2): 255
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Received: Dec. 5, 2024
Accepted: Sep. 18, 2025
Published Online: Sep. 18, 2025
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