Acta Optica Sinica, Volume. 45, Issue 17, 1720002(2025)

Research Progress in Silicon‐Based on‐Chip Integrated Optical Neural Networks (Invited)

Guoyi Tao1,2, Can Huang1,2, Qinghai Song1,2, and Ke Xu1,2、*
Author Affiliations
  • 1School of Integrated Circuits, Harbin Institute of Technology (Shenzhen), Shenzhen 518055, Guangdong , China
  • 2Guangdong Provincial Key Laboratory of Semiconductor Optoelectronic Materials and Intelligent Photonic Systems, Shenzhen 518055, Guangdong , China
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    Figures & Tables(11)
    Biological neuron、artificial neuron and common activation functions. (a) Schematic diagram of biological neuron; (b) schematic illustration of artificial neuron; (c) schematic representation of fully connected neural network; (d) common activation function profiles and their mathematical expressions
    Optical fully connected neural network based on cascaded MZI. (a) Two-layer cascaded MZI optical fully connected neural network incorporating OIU and ONU[72]; (b) complex-valued optical fully connected neural network architecture[73]; (c) packaging architecture and hardware-software collaborative processing workflow of Envise[75]
    Optical fully connected neural network based on MRM arrays. (a) Neural network models and the optical implementation method[77]; (b) core structure and working principle of complex-valued MVM based on MRM arrays[78]; (c) structure and working principle of 4×4 cross-bar MRM array[79]
    Optical fully connected neural network based on diffractive metasurfaces. (a) Schematic of conventional ANN and proposed optical neural network[81]; (b) neural network architecture integrating diffraction units with MZI arrays[83]; (c) structure schematic of on-chip diffractive optical neural network[85]; (d) computational process of execution unit and large-scale clustering in Taichi chip’s distributed computing architecture[86]
    Optical convolutional neural network based on MRM arrays. (a) Conceptual schematic of PTFP chip[89]; (b) schematic diagram of parallel edge extraction unit[92]; (c) integrated photonic tensor core for parallel convolutional processing[93]; (d) experimental setup and processing workflow of photonic convolution accelerator for image processing[94]
    Multiple implementation approaches for optical convolutional neural network. (a) Optical convolutional neural network based on PIN current-controlled attenuators[97]; (b) structure diagram of compact optical convolutional processing unit[98]; (c) schematic representation and working principle of PCNC matrix core[99]; (d) one-dimensional convolution window sliding based on AWGR[100]; (e) diffraction-driven multi-kernel optical convolution unit chip[101]
    In-situ training schemes for optical neural network. (a) Schematic diagram of SPGD in-situ training experimental setup and optical processing chip[107]; (b) principle and experimental scheme of in-situ intensity measurement-based gradient calculation[108]; (c) optical and electrical components for in-situ trainable diffractive neural networks[109]; (d) architecture of fully integrated coherent optical neural network, including input/output, nonlinear activation, and in-situ training process[110]
    Electro-optical activation functions. (a) Experimental setup diagram of MRM-based O-E-O activation function[112]; (b) optoelectronic neurons and absorption curves of different materials based on EAM[113]; (c) core components of electro-optic nonlinear activation function[115]; (d) device structure comprising Ge-Si photodetecter with MZI/MRM-type EO switch[116]
    All-optical activation functions. (a) Schematic of device comprising MRM loaded on MZI and realized activation function profiles[119]; (b) SiGe photodetector integrated with nonlinear activation and in-situ monitoring functions[121]; (c) three-dimensional schematic of graphene/silicon heterojunction device and working principle[123]; (d) schematic of thermally-controlled photodetector and activation function profiles at different temperatures[124]
    Common architectures and applications of optical neural networks[72-73,76-77,85,96,99,107,109,114,121-122,126-129]
    • Table 1. Performance comparison of different on-chip integrated optical neural networks

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      Table 1. Performance comparison of different on-chip integrated optical neural networks

      ReferenceTechnologyThroughout /TOPSEnergy efficiency /(TOPS/W)Precision /bitReconfigurableIntegrated NLAF
      72MZI6.4NA5YesNo
      110MZI0.590.217NAYesYes
      89MRR0.4830.33YesNo
      91MRR0.536223.25YesNo
      85Diffraction1.38×1049.1×104NANoNo
      109Diffraction217.67.28NAYesNo
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    Guoyi Tao, Can Huang, Qinghai Song, Ke Xu. Research Progress in Silicon‐Based on‐Chip Integrated Optical Neural Networks (Invited)[J]. Acta Optica Sinica, 2025, 45(17): 1720002

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    Paper Information

    Category: Optics in Computing

    Received: May. 22, 2025

    Accepted: Jun. 25, 2025

    Published Online: Sep. 3, 2025

    The Author Email: Ke Xu (kxu@hit.edu.cn)

    DOI:10.3788/AOS251135

    CSTR:32393.14.AOS251135

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