Fig. 1. (a) General structure of emerging photonic computing. The digital-system-compatible and efficient calculation is performed by exploiting converters and the intrinsic alignment between a controllable physical phenomenon and a specific arithmetic method. (b) Overview of residue number system. (c) Schematic diagram of the phase-based photonic modular arithmetic processor (PPMAP) architecture. (d) Mapping between operands and phase when taking modulus mi=12 as an example, along with a demonstration of basic modular arithmetic performed based on this mapping.

Fig. 2. Phase manipulation on the integrated chip. (a) Schematic diagram of the experimental setup. PCB, printed circuit board; MVS, multi-channel voltage source; MPM, multi-channel optical power meter. (b) Micrograph of the integrated photonic chip and (c) MMI-structured OPDC, with five output channels. (d) The relationship between the voltage applied to PM0 and the magnitude of consequential phase change, and (e) the corresponding normalized optical power of the output signals. The zero phase reference point is chosen as φb, while the optical power signals from multiple channels were normalized relative to optimized thresholds, ensuring that all thresholds are aligned at 0.5 on the graph. (f) The multi-channel optical power signals along with their corresponding threshold decision results (red or green for zero or one, respectively) at each time slot, and (g) the phase signal reconstructed from the optical power signals.

Fig. 3. Demonstration of PPMAP for algebraic operation (a) Schematic of the PPMAP architecture in the demonstration experiment, which contains three units. (b) The operand or function assigned to each modulator. (c)–(e) The parallel photonics-accelerated modular arithmetic operations in moduli {10, 9, 7}. In different time slots, applying (c) voltage signals corresponding to RNS-formatted operands to the modulators to perform operations on different sample sets, resulting in (d) output phase signals and (e) quantized results obtained from the OPDC. (f) The method of mapping operands to corresponding phases: since φb has been provided by PM0, we directly control the voltage of PM2 to induce a phase change of ΔφX=X·2π/m for operand X and control the voltage of PM1 and PM3 to generate a phase change equal to 2π−ΔφX when mapping X to phase ΔφX.

Fig. 4. Feasibility verification of the photonic conversion interface. This experiment demonstrates a PPMAP unit with m=7 consisting of one OPDC and one 4-bit ODPC. Four PMs are controlled by four parallel digital signals and convert the 4-bit operands into phases. In this proof-of-concept experiment, the digital signals are scaled corresponding to the bit position to produce the expected phase change.

Fig. 5. Analysis on precision and reliability. (a) The relative calculation error of PPMAP and intensity-based optical computing methods in simulating a 15-bit multiplication task under varying SNR levels. (b) The relative frequency of errors obtained from simulation results for PPMAP, along with its probability model.

Fig. 6. The relationship between multi-channel optical power values and normalized optical power values with respect to phase change, as well as the optimized thresholds for m=9 (a) and 7 (b). The normalization method involved scaling the original optical power values for each channel such that the optimized thresholds were uniformly scaled to 0.5.

Fig. 7. (a) Structure diagram of a PPMAP unit that adopts the generalized design of OPDC. (b) Example of the grouping strategy of input digital signals, which is based on the bit weight |2i|m.

Fig. 8. (a) Schematic diagram of PPMAP chip on lithium niobate platform. (b) Experimental setup for the performance demonstration experiment. AWG, arbitrary waveform generator; OCS, oscilloscope; AMP, voltage amplifier; BPF, band-pass filter. (c) Waveforms recovered in the phase domain, displaying the computational results achieved at 1 GHz under moduli 7 and 10. (d) For m=10, the output intensity waveforms of OPDC.

Fig. 9. (a) Structural rendering, (b) micrograph, and (c) the relationship between optical power and phase change of each channel, along with the phase intervals (taking m=18 as an example), for the nine-channel OPDC.

Fig. 10. Performance comparison of electronic processor under various processes and PPMAP. The black dots represent performance data for different VDD values under various processes, derived from the scaling method and data presented in Refs. [62,64]. The solid line corresponds to the fitting and extrapolation of the former. The power consumption model of PPMAP assumes a fixed capacitance, with parameters obtained from Refs. [7,63], while PPMAP* provides an estimate under the assumption of a one-order-of-magnitude improvement in the energy efficiency of optoelectronic devices.