This paper presents a design scheme of high-resolution digital LCoS chip, which can be used in the wavelength selective switch in all-optical communication networks. The LCoS chip-driving algorithm, overall architecture, component module simulation, and system verification results are presented. The pixel unit adopts the 9T static random-access memory (SRAM) scheme, which realizes two selectable modes of high-speed progressive refresh and global refresh on digital pixels for the first time. This design is based on 0.18 μm complementary metal-oxide-semiconductor transistor (CMOS) technology. Through optimization, the relatively small pixel size of 5.5 μm×3.5 μm is achieved. A 10 bit gray scale, 3840×2160 resolution, and 60 Hz frame rate are realized. Systematic verification via field-programmable gate array (FPGA) and post-simulation of the pixel unit verify that the proposed scheme satisfies the design requirements.