With the digital development of readout circuits in infrared detector systems, the requirements for clock signals in readout circuits are becoming increasingly stringent to ensure accurate processing of digital signals, including computation, transmission, and storage. In this paper, a high-speed clock signal generation circuit based on a charge pump phase-locked loop structure with excellent comprehensive performance is designed to achieve fast locking and stable output of a 640 MHz low-noise high-speed clock signal under the condition of a 20 MHz reference clock signal from the crystal oscillator. The designed is based on SMIC 0.18μm process, and the simulation result shows that total power consumption is less than 5 mW at 1.8 V power supply, the control voltage ripple after the phase-locked loop is kept within 500 μV, the locking time is 4μs, the phase noise is less than -99 dBc/ Hz@1MHz, and the clock jitter is less than 5 ps.