Laser & Optoelectronics Progress, Volume. 60, Issue 12, 1228005(2023)

Correlated Multiple Sampling Technique for Low-Light CMOS Image Sensors

Shaomeng Li, Kaiming Nie*, and Jiangtao Xu
Author Affiliations
  • School of Microelectronics, Tianjin University, Tianjin 300072, China
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    Figures & Tables(12)
    Architecture of traditional SS ADC
    Timing diagrams of traditional CMS technique
    Diagram of the SS ADC with voltage adaptive CMS technique
    Principles of voltage adaptive CMS technology. (a) Vpixel<Vref; (b) Vpixel>Vref
    Architecture of comparator
    Architecture of counter
    Architecture of ramp generator
    Relationship between input and code value
    DNL/INL performance of low noise SS ADC
    Relationship between SNR and input value
    • Table 1. Parameters of the two-stage comparator

      View table

      Table 1. Parameters of the two-stage comparator

      ItemCurrent /µA3 dB bandwidth /kHzGain /dB
      First stage6.061843.5
      Second stage2.856444.03
    • Table 2. Comparison with prior techniques

      View table

      Table 2. Comparison with prior techniques

      ParameterMethod in Ref.[1Method in Ref.[2Traditional method*This work*
      Process node /nm180110110
      Power supply(P)/V3.3/1.83.3/1.53.3/1.5
      Resolution /bit10/14111111
      Sampling times /1064544/2
      Random noise(Inoise)/µV127738082
      1 Horizon time(T)/µs283623
      Power /µW4543
      FOMa1 /(fJ·step-1791483
      FOMb2 /(nVrms·Hz-12.022.881.93
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    Shaomeng Li, Kaiming Nie, Jiangtao Xu. Correlated Multiple Sampling Technique for Low-Light CMOS Image Sensors[J]. Laser & Optoelectronics Progress, 2023, 60(12): 1228005

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    Paper Information

    Category: Remote Sensing and Sensors

    Received: May. 5, 2022

    Accepted: Jun. 22, 2022

    Published Online: Jun. 5, 2023

    The Author Email: Kaiming Nie (nkaiming@tju.edu.cn)

    DOI:10.3788/LOP221508

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