Chinese Journal of Liquid Crystals and Displays, Volume. 36, Issue 7, 1042(2021)

Heterogeneous verification framework of IP core for image processing algorithm

ZHAO Lu1, WEN Jian-ping1, MO Wei2,3, CHEN Shi-rui1, and LI Xiang-he1
Author Affiliations
  • 1[in Chinese]
  • 2[in Chinese]
  • 3[in Chinese]
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    References(13)

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    [14] [14] JAIN A, GUPTA R. Unified and modular modeling and functional verification framework of real-time image signal processors [J]. VLSI Design, 2016, 2016: 7283471.

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    [17] [17] LUO H B, GAI X Q, CHANG Z, et al. A real-time multi-scale 2D Gaussian filter based on FPGA [C]//Proceedings of SPIE 9301, International Symposium on Optoelectronic Technology and Application 2014: Image Processing and Pattern Recognition. Beijing, China: SPIE, 2014: 930104.

    [19] [19] RABOZZI M, DURELLI G C, MIELE A, et al. Floorplanning automation for partial-reconfigurable FPGAs via feasible placements generation [J]. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 2017, 25(1): 151-164.

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    ZHAO Lu, WEN Jian-ping, MO Wei, CHEN Shi-rui, LI Xiang-he. Heterogeneous verification framework of IP core for image processing algorithm[J]. Chinese Journal of Liquid Crystals and Displays, 2021, 36(7): 1042

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    Paper Information

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    Received: Nov. 30, 2020

    Accepted: --

    Published Online: Sep. 4, 2021

    The Author Email:

    DOI:10.37188/cjlcd.2020-0322

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