The verification of IP core of image processing algorithm is the key of SoC and FPGA application in the field of machine vision. In order to shorten the verification cycle, based on ARM+FPGA heterogeneous platform and combined with software on PC, a verification framework with universal application, real-time performance and agility is designed for IP core of image processing algorithm. The verification framework establishes gigabit ethernet communication with PC through ARM to realize real-time input of test image and video, uses FPGA to build data bus and configuration bus for the purpose of compatibility with multi-type images, and combines partial reconfiguration to realize fast iteration of IP core of the algorithm to be verified. The validation framework is reusable for the algorithm IP core with 8, 16, and 24 bit depth images as processing objects and results, and the deployment speed of the IP cores to be verified is 25 times faster than global reconfiguration. Compared with the existing FPGA verification technology, it has better reusability, shorter verification cycle, more targeted test stimulus, and faster deployment of IP cores to be verified