The critical path exhibits significant variations under different process corners, necessitating extensive static timing analysis. Consequently, timing analysis needs long execution times, and the accuracy of static timing analysis becomes increasingly important as process sizes continue to shrink. A machine learning-based delay prediction method specifically designed for different process corners was proposed in this paper. By considering the impact of Process, Voltage and Temperature (PVT) on timing, the critical path was globally aggregated and encoded by using a self-attention transformer model to predict the statistical delay across various PVT conditions. The verifications using the EPFL reference circuit demonstrate that the average absolute error of the proposed method ranges from 5.8% to 9.4%, showcasing its strong prediction performance. This approach can enhance the accuracy and efficiency of timing analysis, leading to shorter design cycles and reduced costs in digital circuit design.