Fig. 1. (a) Schematic of a patterned anode; (b) computational domain and boundary conditions of the model in the present study.

Fig. 2. Model validation of the present LB model.

Fig. 3. Patterned anode performance at standard case: (a) Potential distribution in the entire anode; (b) potential distribution at z/H_ion = 1.0; (c) potential distribution at TPBs; (d) effect of dimensionless potential (Fϕ₀/RT) on dimensionless average current density (i_av/i₀); (e) effect of dimensionless exchange current density (i_ex/i₀) on i_av/i₀; (f) combined effect of i_ex/i₀ and Fϕ₀/RT on i_av/i₀; (e) phase map generated based on panel (f) for rational design and operation of patterned anode.

Fig. 4. Effect of height-to-width ratio of electronic conductor (H_ele/L_ele) on patterned anode performance: (a) Combined effect of dimensionless exchange current density (i_ex/i₀) and dimensionless potential (Fϕ₀/RT) on dimensionless average current density (i_av/i₀); (b) phase maps under different H_ele/L_ele generated based on panel (a) for rational design and operation of patterned anode.

Fig. 5. Effect of width-to-spacing ratio of electronic conductor (L_ele/ΔL) on patterned anode performance: (a) Combined effect of dimensionless exchange current density (i_ex/i₀) and dimensionless potential (Fϕ₀/RT) on dimensionless average current density (i_av/i₀); (b) phase maps under different L_ele/ΔL generated based on panel (a) for rational design and operation of patterned anode.

Fig. 6. Effect of height-to-width ratio of ionic conductor (H_ion/L_ion) on patterned anode performance: (a) Combined effect of dimensionless exchange current density (i_ex/i₀) and dimensionless potential (Fϕ₀/RT) on dimensionless average current density (i_av/i₀); (b) phase maps under different H_ion/L_ion generated based on panel (a) for rational design and operation of patterned anode.