Fig. 1. Circuit schematic of the pulse-compression device

Fig. 2. Power gain vs Z₂ and τ₂

Fig. 3. Structure schematic of the pulse-compression device

Fig. 4. Simulation model of the pulse-compression device in CST MWS

Fig. 5. Simulation of the charging voltage in TL₃

Fig. 6. Output voltage waveform of TL₁

Fig. 7. Charging voltage waveform of TL₃

Fig. 8. Output voltage waveform of the power divider after the pulse-compression device

Fig. 9. Internal photo of the pulse compression device after outputting 300 000 pulses