Chinese Optics Letters, Volume. 15, Issue 8, 081301(2017)
Polarization insensitive arrayed-input spectrometer chip based on silicon-on-insulator echelle grating
Fig. 1. Schematic diagram of the imaging spectrometer, where the arrayed-input EDG is used. Lens 1 represents the fore-optic lens, and the micro-electromechanical system (MEMS) mirror array operates as an optical switch array for
Fig. 2. (a) Scanning electron microscope (SEM) images of the cross-section of a deep etched strip waveguide, (b) cross-section of a shallow etched ridge waveguide, (c) tapers between ridge waveguides and deep etched strip waveguides, (d) cross-section of the Al coated surface, and (e) the grating facets of the EDG. (f) The photograph of the EDG chip compared with one yuan coin.
Fig. 3. (Color online) Transmission spectra for (a) input waveguide No. 1, (b) input waveguide No. 33, and (c) input waveguide No. 65. The enlarged spectra for output channel Nos. 32 to 34 of input waveguide No. 33 are given in (d), showing the detailed polarization insensitive characteristics.
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Minyue Yang, Mingyu Li, Jianjun He, "Polarization insensitive arrayed-input spectrometer chip based on silicon-on-insulator echelle grating," Chin. Opt. Lett. 15, 081301 (2017)
Category: Integrated Optics
Received: Feb. 20, 2017
Accepted: Apr. 14, 2017
Published Online: Jul. 20, 2018
The Author Email: Jianjun He (jjhe@zju.edu.cn)