Chinese Optics Letters, Volume. 15, Issue 8, 081301(2017)

Polarization insensitive arrayed-input spectrometer chip based on silicon-on-insulator echelle grating

Minyue Yang, Mingyu Li, and Jianjun He*
Author Affiliations
  • State Key Laboratory of Modern Optical Instrumentation, Centre for Integrated Optoelectronics, College of Optical Science and Engineering, Zhejiang University, Hangzhou 310027, China
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    Figures & Tables(4)
    Schematic diagram of the imaging spectrometer, where the arrayed-input EDG is used. Lens 1 represents the fore-optic lens, and the micro-electromechanical system (MEMS) mirror array operates as an optical switch array for N pixels. The chip structure is enlarged, and the arrayed input waveguides receive the N corresponding pixels one by one. Thus, the spectrum of each pixel is obtained in a time division multiplexing fashion.
    (a) Scanning electron microscope (SEM) images of the cross-section of a deep etched strip waveguide, (b) cross-section of a shallow etched ridge waveguide, (c) tapers between ridge waveguides and deep etched strip waveguides, (d) cross-section of the Al coated surface, and (e) the grating facets of the EDG. (f) The photograph of the EDG chip compared with one yuan coin.
    (Color online) Transmission spectra for (a) input waveguide No. 1, (b) input waveguide No. 33, and (c) input waveguide No. 65. The enlarged spectra for output channel Nos. 32 to 34 of input waveguide No. 33 are given in (d), showing the detailed polarization insensitive characteristics.
    • Table 1. Design Parameters of the EDG

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      Table 1. Design Parameters of the EDG

      Wavelength range1250–1750 nm
      Wavelength spacing of adjacent channels7.81 nm
      Linear dispersion640
      Output waveguide number129
      Input angle range5.90°–9.39°
      Output angle range1.17°5.75°
      Diffraction order m2
      Rowland circle radius r2651 μm
      Grating period d5.00 μm
      ng/neff1.047
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    Minyue Yang, Mingyu Li, Jianjun He, "Polarization insensitive arrayed-input spectrometer chip based on silicon-on-insulator echelle grating," Chin. Opt. Lett. 15, 081301 (2017)

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    Paper Information

    Category: Integrated Optics

    Received: Feb. 20, 2017

    Accepted: Apr. 14, 2017

    Published Online: Jul. 20, 2018

    The Author Email: Jianjun He (jjhe@zju.edu.cn)

    DOI:10.3788/COL201715.081301

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