The use of silicon photonics (SiPh)1^–4 has witnessed exponential growth over the past decade. This increase is driven by the relentless and explosive expansion of consumer data, the necessity for real-time processing of wideband signals, and the significant energy demands of the data center industry, which consumed between 1% and 5% of global power in 2020.5 Photonic integrated circuits (PICs) present effective solutions to these challenges, offering solutions where there is a demand for energy efficiency and high computational throughput in disruptive technologies, including optical communications transceivers,6^,7 lidar systems,8 quantum optics devices,9 and optical sensors.10 In addition, emerging computing architectures for artificial intelligence and neuromorphic computing, leveraging SiPh, have shown numerous benefits—such as multiwavelength capabilities, ultrahigh speeds, and low power consumption—that address the limitations of complexity, cost, and footprint associated with traditional electronic computing components.11

Both mainstream and emerging applications necessitate the development of highly complex PICs that incorporate an extensive library of on-chip components such as (de)multiplexers, phase shifters, modulators, laser sources, photodetectors, and fiber-to-chip couplers. Among these, phase shifters stand out as a pivotal component in most PICs, enabling the manipulation of the real part of the effective refractive index with minimal—ideally zero—alteration to the imaginary part. The demand for components that combine ultralow optical loss with a compact footprint is critical for ensuring the scalability of advanced PICs and meeting the rigorous requirements of emerging applications. In this context, silicon thermo-optic phase shifters (TOPSs) have emerged as the prevalent method. TOPSs utilize the variation in silicon’s refractive index—where light is predominantly confined—due to changes in temperature. Silicon TOPSs have become the cornerstone for the development of sophisticated PICs, showcasing the vast potential of SiPh technology across various application domains. Notable examples include optical reconfigurable and multipurpose photonic circuits,9^,12 phased arrays for lidar systems,13 optical neural networks,14 and Fourier transforming for optical spectrometry,15 with demonstrators integrating from $\sim 50$ to 176 TOPSs.9 However, the intrinsic heating mechanism of TOPSs often results in high power consumption and slow operation. As a consequence, various optimization configurations and strategies have been proposed to enhance power efficiency and switching speed, or both, making the topic of TOPSs a blooming area of research over the past decade.

In this review, we explore the configuration and optimization strategies that have been proposed for TOPSs in SiPh. Our discussion begins with an examination of the fundamental principles underlying thermo-optic tuning in silicon waveguides, along with basic design guidelines and the trade-offs required for achieving optimal performance. Subsequently, we delve into the advancements in various TOPS technologies, highlighting developments in metallic heaters, transparent heaters, doped silicon, folded waveguide structures, and multipass waveguide configurations. Finally, TOPSs are compared with alternative technologies, providing a comparative analysis. A concluding section is dedicated to discussing prospective technological advancements and the future outlook for TOPSs in SiPh.

Thermo-optic phase tuning in silicon waveguides is achieved by applying localized heat and exploiting the large thermo-optic coefficient of silicon, $\sim 1.8-1.9\times {10}^{-4}{\mathrm{K}}^{-1}$.16^,17 It is important to note that for devices utilizing ${\mathrm{SiO}}_2$ as the waveguide cladding, the thermo-optic effect of ${\mathrm{SiO}}_2$ is typically disregarded since it is an order of magnitude lower than that of silicon, $\sim 9\times {10}^{-6}$.18 The phase shift variation $\mathrm{\Delta }\varphi$ in a waveguide can be expressed as $$\mathrm{\Delta }\varphi =\frac{2\pi }{\lambda }\mathrm{\Delta }{n}_{\mathrm{eff}}L,$$(1)where $\lambda$ is the wavelength, $\mathrm{\Delta }{n}_{\mathrm{eff}}$ is the variation in the effective refractive index, and $L$ is the path length. When the phase shift is induced by a change in the waveguide temperature, it is described by $$\mathrm{\Delta }\varphi =\frac{2\pi }{\lambda }\frac{\partial n_{\mathrm{eff}}}{\partial T}\mathrm{\Delta }TL,$$(2)where $\partial n_{\mathrm{eff}}/\partial T$ is the thermo-optic coefficient of the optical mode, and $\mathrm{\Delta }T$ represents the temperature increase.

According to joule heating, the temperature increase is directly proportional to the power consumed by the microheater, denoted as $\mathrm{\Delta }T\propto P_{\mathrm{elec}}$. Consequently, the power consumption of TOPSs, specifically the power required to induce a phase shift of $\pi$ ($P_{\pi }$), can be formulated as $$P_{\pi }=\frac{\lambda }{2L}{\left(\frac{\partial n_{\mathrm{eff}}}{\partial P_{\mathrm{elec}}}\right)}^{-1},$$(3)where $\partial n_{\mathrm{eff}}/\partial P_{\mathrm{elec}}$ represents the variation of the effective refractive index with the electrical power applied to the microheater. For TOPSs that are invariant in the propagation direction, such variation is proportional to the active length of the heater. Hence, in Eq. (3), the value of $P_{\pi }$ does not significantly vary with the length of the phase shifter. This implies that the same phase shift can be achieved using either short but intensely heated active heaters or longer but mild heaters, with the electrical power required to reach the desired temperature remaining constant. However, if the phase shift architecture is designed to vary with the direction of light propagation, it is possible to disrupt this relationship and achieve higher thermo-optic efficiencies while maintaining the same active footprint.

To assess the performance of TOPSs, the following figure of merit (FOM) is commonly employed and aimed to be minimized: $$\mathrm{FOM}=P_{\pi }\tau ,$$(4)where $P_{\pi }$ represents the power required to induce a phase shift of $\pi$, typically expressed in milliwatts (mW), and $\tau$ denotes the switching time, measured in microseconds ($\mu \mathrm{s}$). On the other hand, to experimentally determine the performance metrics of the phase shifters, these devices are often integrated into interferometric structures, such as Mach–Zehnder interferometers (MZIs), microring resonators (MRRs), or multimode interferometers (MMIs).

The fundamental design of a TOPS typically involves a straight silicon waveguide accompanied by a parallel heater, resulting in a device that is invariant along the propagation direction. The heater is constructed from an electrically conductive material, designed to allow the flow of an electrical current and consequently generate joule heating, described by the equation $P_h=I_h^2{R}_h$, where $I_h$ represents the current flowing through the heater, and $R_h$ denotes the resistance of the heater. In addition, an alternative approach to heater design involves doping the silicon waveguide itself, thereby enabling the waveguide to function as the heater by facilitating electrical conductivity and heat generation directly within the silicon.

In the context of a propagation-invariant configuration for TOPSs, the power consumption can be analytically approximated, as detailed by Jacques et al.,19 by the equation, $$P_{\pi }\approx \mathrm{\Delta }{T}_{\pi }GA,$$(5)where $G$ represents the thermal conductance between the heated waveguide and the surrounding materials, and $A$ denotes the area through which the heat flow occurs. Similarly, an analytical expression for the switching speed, $\tau$, can be derived, indicating its dependence on the thermal properties and geometry of the system,19$$\tau \approx \frac{H}{G}\propto \frac{AL}{G},$$(6)in which $H$, the heat capacity of the heated waveguide, is proportional to the product of the area, $A$, and the length, $L$, of the waveguide ($H\propto AL$).

To minimize power consumption in TOPSs, it is crucial to incorporate waveguides with materials of low thermal conductivity and to minimize the distance between the waveguide and the heater. However, reducing the distance between the heater and the waveguide often results in a trade-off, as it may increase optical loss due to heater absorption. Conversely, using materials with low thermal conductivity can indeed reduce power consumption but at the cost of slower switching speed. Therefore, unless the gap between the heater and the waveguide is diminished, a distinct trade-off between power consumption and switching speed exists. According to Eqs. (5) and (6), one potential strategy to achieve faster switching speeds without escalating power consumption involves decreasing the heat capacity of the waveguide, which suggests the use of shorter active lengths. However, this approach entails challenges. By analyzing Eq. (2), it is evident that $L_{\pi }\propto 1/\mathrm{\Delta }{T}_{\pi }$. In this regard, opting for short heater lengths can give rise to critical temperature values. High temperatures can compromise the performance of the heater caused by the self-heating phenomenon produced by the increase of the heater resistance with the temperature.18 Therefore, the actual temperature increase is lower than expected, assuming a constant heater resistance and thereby yielding a different phase shift. In addition, employing such compact phase shifters increases the susceptibility of adjacent structures to thermal cross talk, potentially affecting the overall device performance.

Several optimization strategies to enhance power consumption, switching speed, or both, have been explored in the literature, as we discuss in the Secs. 3.1–3.3. Initially, we examine the use of metallic heaters to decrease power consumption by reducing the thermal conductance of the surrounding waveguide environment. This approach, however, results in a longer switching speed. Subsequently, we explore the application of transparent heaters, which aim to diminish the gap between the heater and the waveguide, i.e., the area $A$ traversed by the heat flow [refer to Eqs. (5) and (6)], without penalizing the optical loss of the device. The final approach involves direct heating of the silicon waveguide through doping, thereby transforming it into a resistive element. This technique offers significant improvements in both power consumption and switching speed by minimizing the value of $A$, though it introduces optical loss due to free carriers. It is important to note that this direct heating approach is specific to the SiPh platform and is not applicable to other emerging photonics platforms, such as silicon nitride. Unless specified otherwise, the results discussed herein pertain to transverse electric (TE) polarization at a wavelength of $\sim 1550\mathrm{nm}$.

The most commonly employed method for inducing localized heating in a silicon waveguide or structure involves the use of metallic heaters and the principle of joule heating [Fig. 1(a)]. Such resistive heaters are typically configured as metal wires placed atop the silicon structure, separated by an intermediate dielectric layer, such as ${\mathrm{SiO}}_2$, to mitigate optical loss [Fig. 1(b)]. The thickness of these heaters is generally on the order of $\sim 100\mathrm{nm}$, determined by standard fabrication techniques, including lift-off procedures. In addition, a diverse range of metals or metallic compounds compatible with complementary metal–oxide–semiconductor (CMOS) fabrication technology can be utilized for the heaters. These materials include copper (Cu), nickel silicide (NiSi), platinum (Pt), titanium (Ti), titanium nitride (TiN), and tungsten (W). Figure 1(c) shows the temperature distribution within a typical TOPS based on a metallic heater, featuring a $1\text{-}\mu \mathrm{m}$-thick oxide cladding layer situated between the silicon waveguide and the metallic heater.

Table 1 surveys the experimental works that have employed metallic heaters alongside various generic optimization strategies to develop phase shifters in straight silicon waveguides. It is important to note that while the focus of these studies is on the use of metallic heaters, the optimization strategies outlined are versatile and can be applied to other methodologies discussed in subsequent sections.

Espinola et al.21 provided one of the pioneering experimental demonstrations of TOPSs on silicon nearly two decades ago. The design featured a silicon waveguide with a Cr/Au heater measuring $14\mu \mathrm{m}$ in width and 100 nm in thickness, positioned atop the waveguide. The phase shifter spanned a length of $700\mu \mathrm{m}$, separated from the heater by a $1\text{-}\mu \mathrm{m}$-thick layer of ${\mathrm{SiO}}_2$. Integrated within an MZI to function as a switch, the device exhibited significant optical loss (32 dB), which the authors attributed primarily to scattering caused by considerable sidewall roughness in the waveguide. Despite its status as one of the initial experimental reports in this field, the device demonstrated a power consumption of 50 mW and a switching time of $3.5\mu \mathrm{s}$, resulting in a FOM of $175\mathrm{mW}\mu \mathrm{s}$. Notably, subsequent studies have reported similar, or at times, inferior performance metrics.22^,23

On the application side, the capabilities of TOPSs have been harnessed for switching purposes by cascading $1\times 2$ MZI switches to implement $1\times N$ configurations.23 A significant advantage of these switches lies in their compact design, with the phase shifter elements measuring only $40\mu \mathrm{m}$ in length. Nonetheless, these devices were characterized by considerable power consumption and slow switching speeds, reported at 90 mW and $100\mu \mathrm{s}$, respectively. The primary factor contributing to such a suboptimal performance is the substantial width of the heaters, $\sim 20\mu \mathrm{m}$, which enlarges the cross-sectional area $A$ of the phase shifter, as shown in Eqs. (5) and (6). A notable improvement in power consumption and switching speed—to 40 mW and $30\mu \mathrm{s}$, respectively—can be achieved by reducing the heater width to $5\mu \mathrm{m}$, as demonstrated in subsequent studies.25

Atabaki et al.26 have highlighted the substantial influence of the heater width and the intermediate layer on the performance of TOPSs equipped with metallic heaters atop silicon waveguides. Narrow heaters, with widths of less than $\sim 2\mu \mathrm{m}$, are shown to enable faster switching time ($\sim 4\mu \mathrm{s}$) and lower power consumption ($\sim 16\mathrm{mW}$), attributed to the reduced volume of heating. However, reducing the heater width below $2\mu \mathrm{m}$ does not yield significant further improvements, primarily due to the lateral heat diffusion, which spans $\sim 1$ to $2\mu \mathrm{m}$, thus becoming comparable to the microheater’s dimensions.

Furthermore, the selection of material for the waveguide cladding plays a critical role in modulating both power consumption and switching speed, establishing a trade-off with the thermal conductivity of the cladding material. Enhancing the thermal conductivity, while keeping the specific heat capacity constant, accelerates the phase shifter’s response but increases power requirements [refer to Eqs. (5) and (6)]. Substituting ${\mathrm{SiO}}_2$ with SiN is one strategy to enhance switching speed. Moreover, applying high-energy-pulsed drive signals can further decrease switching time, potentially to submicrosecond scales, as demonstrated by the use of a pre-emphasis pulse [illustrated in Fig. 1(d)]. This approach swiftly achieves the steady-state operation, although the inherent delay in heat transfer from the heater to the silicon waveguide sets a lower bound on achievable switching time.

The employment of parallel heaters alongside the silicon waveguide has been showcased as a method to realize low-loss, energy-efficient, and fast phase shifters.29 This approach utilizes a rib waveguide configuration instead of the conventional strip design, with heaters positioned on both sides of the waveguide’s thin bottom slab. In Ref. 28, the heaters were composed of a 20-nm-thick NiSi layer, featuring widths varying from 500 nm to $3\mu \mathrm{m}$. Notably, a layer of SiN is deposited atop the silicon waveguide prior to heater formation to inhibit silicide development within the waveguide structure. By setting the distance between the heaters and the waveguide at 500 nm, a balance between low optical loss and a remarkable FOM of $60\mathrm{mW}\mu \mathrm{s}$ was attained, accompanied by a power consumption of 20 mW and a switching time of $3\mu \mathrm{s}$. Despite the phase shifter’s relatively high propagation loss of $25\mathrm{dB}/\mathrm{cm}$, its compact length ($40\mu \mathrm{m}$) resulted in an insertion loss of less than 1 dB.

Lower FOM values have also been reported through the strategic placement of metallic heaters directly atop the silicon structure, leveraging silicon’s thermal conductivity,32 achieving a power consumption of merely 12 mW and a switching time of $2.9\mu \mathrm{s}$. To circumvent optical losses associated with NiCr heaters, a microdisk with a $4\mu \mathrm{m}$ diameter was utilized as the phase-shifting element, minimizing metal–light interactions to less than 1 dB of loss due to the evanescent nature of the optical mode toward the device’s center.

The application of the pre-emphasis technique, as previously mentioned,26 further reduces the switching time to 85 ns ($\mathrm{FOM}\approx 1\mathrm{mW}\mu \mathrm{s}$), enhancing the responsiveness of ON/OFF switching devices based on thermal phase shifters. Such devices benefit from differential or balanced architectures, enabling optical changes by selectively heating one of the optical paths. However, the primary challenge lies in the cooling period required for the heaters, as simultaneous cooling of both paths is essential before initiating the next switch to prevent continuous device heating.

The selection of an appropriate metal for the heaters is crucial not only from the perspective of minimizing optical loss but also to ensure that electrical power dissipation occurs predominantly within the heater rather than in the interconnections. While the optical loss may not be significantly affected by the choice of heater metal, the efficiency of power dissipation is paramount. The integration of the heater metal into a CMOS process flow is a critical consideration when selecting the optimal material for the heater. Although tin- and nickel-based alloys can be patterned as heaters within a CMOS process, foundries often prefer Cu and W due to their more desirable characteristics.

W, in particular, is favored for its relatively high resistivity and melting point, offering enhanced stability for the heaters.33 This stability is beneficial for devices that require consistent performance over time. In addition, W heaters can be electrically interconnected with Cu wires, taking advantage of Cu’s lower resistivity to ensure that most of the heat is dissipated in the W heater. This configuration maximizes the thermal efficiency of the device.

Masood et al.33 demonstrated the effectiveness of W heaters in a silicon waveguide, fabricated using a CMOS-like layer stack without further optimization. The devices exhibited power consumption levels of around 22 mW and switching time of $\sim 40\mu \mathrm{s}$. The optical loss was reported to be less than 1 dB, with excellent electrical stability observed over 750 switching cycles.

Thermal cross talk is a critical consideration in densely packed PICs, where the proximity of devices can lead to undesirable interference due to heat diffusion. Depending on the TOPS configuration, the minimum thermal cross talk between devices can range between less than 10 to $50\mu \mathrm{m}$.19^,34 Although utilizing longer heaters can decrease the temperature difference required to achieve a phase shift of $\pi$ as indicated by Eq. (2), this approach also expands the device’s footprint and potentially increases optical loss. Thus, achieving an optimal balance among device specifications necessitates careful consideration and judicious optimization.

A strategy to mitigate parasitic thermal phase shifts involves the implementation of deep trenches between the aggressor (source of thermal interference) and victim (affected device) components.19 This technique effectively isolates devices thermally, minimizing cross talk without compromising the compactness or performance of the circuit. By employing such structural modifications, PIC designers can enhance device integration density while maintaining control over thermal effects, ensuring that each component functions as intended with minimal interference.

The thermal isolation of phase shifters, achieved through the implementation of air trenches or by detaching the structure from the substrate via an undercut [illustrated in Figs. 2(a) and 2(b)], significantly decreases power consumption. This reduction is due to the air’s thermal conductivity being nearly 2 orders of magnitude lower than that of ${\mathrm{SiO}}_2$ ($\sim 0.025\mathrm{W}{\mathrm{m}}^{-1}{\mathrm{K}}^{-1}$), thereby concentrating and elevating the temperature within the silicon waveguide, as depicted in Fig. 2(c). However, it is important to note that this approach leads to an increase in switching time [as indicated by Eqs. (5) and (6)]. Despite this drawback, such thermal optimization strategies are particularly beneficial for deploying multiple phase shifters within applications where moderate total power consumption is prioritized over rapid switching speeds.

A straightforward method for achieving thermal isolation involves deep etching on both sides of the waveguide, preserving the conventional heater-waveguide layout. Following this approach, devices have demonstrated power consumption and switching speeds around 10 mW and $10\mu \mathrm{s}$, respectively.24 Moreover, submilliwatt power consumption (0.54 mW) has been reported for waveguides released from the substrate.27 These freestanding phase shifters, supported by two ${\mathrm{SiO}}_2$ struts across a $320\text{-}\mu \mathrm{m}$-long released waveguide, exhibit mechanical stability. However, this configuration results in the extended switching time, increasing from $39\mu \mathrm{s}$ in the attached version to $141\mu \mathrm{s}$ upon release. Recent studies have reported similar outcomes for released switching structures,28^,30^,31 underscoring the trade-offs between power efficiency, switching speed, and structural design in the development of TOPSs.

Transparent heaters, i.e., electrically conductive materials with minimal optical loss in the near-infrared region, provide a strategic avenue to mitigate the trade-off between optical loss, power consumption, and switching speed in TOPSs. This approach facilitates placing the heater in close proximity to the silicon waveguide, as illustrated in Figs. 3(a) and 3(b), significantly reducing both the temperature gradient and the diffusion time between the waveguide and the heater. Consequently, this configuration not only improves the efficiency of heat transfer but also enhances the switching time of the phase shifter by shortening the thermal diffusion pathway.

Transparent heaters can be constructed using either two-dimensional (2D) materials or transparent conducting oxides (TCOs). 2D materials, such as graphene and carbon nanotubes (CNTs), offer the advantage of low optical loss due to their exceptional optical properties and atomic-scale thickness while also being electrically conductive. However, fabricating heaters from graphene presents challenges not encountered with traditional metal heaters. Typically, graphene heaters are produced by synthesizing a monolayer through chemical vapor deposition and subsequently transferring it onto the photonic chip, followed by precise patterning. It is important to note that the optical and electrical characteristics of graphene heaters are significantly influenced by the quality of the graphene sheet.

By contrast, TCOs such as indium tin oxide (ITO) are widely utilized in various optoelectronic applications, including photovoltaic cells and displays, due to their well-established and mature fabrication techniques, such as sputtering. TCOs combine transparency in the visible to near-infrared range with good electrical conductivity, making them suitable for integration into photonic devices.

Table 2 summarizes the main specifications for experimental TOPSs in silicon that utilize transparent materials for heating.

Graphene, renowned for its electrical conductivity, also boasts a remarkable thermal conductivity of $\sim 5000\mathrm{W}{\mathrm{m}}^{-1}{\mathrm{K}}^{-1}$.42 Initial propositions for incorporating graphene into silicon waveguides for thermo-optic tuning aimed to exploit its thermal conductance, envisioning a graphene layer to bridge the metallic heater and the silicon waveguide for more effective heat transfer.35 Despite these efforts, experimental outcomes indicated power consumption exceeding 50 mW and a moderate switching speed of $20\mu \mathrm{s}$, failing to surpass the performance of conventional metal-based phase shifters. In addition, numerical simulations revealed that the graphene layer could induce optical losses around 5 dB, further challenging its practicality for this application.

Subsequent advancements were made by adopting a similar approach and silicon structure as outlined in Ref. 31, where a graphene heater was implemented atop a silicon microdisk, replacing the metallic counterpart.43 This configuration achieved a power consumption of 23.5 mW and a switching speed of $\sim 10\mu \mathrm{s}$, with the insertion loss attributable to the graphene heater being negligible ($<2\times {10}^{-4}\mathrm{dB}/\mu \mathrm{m}$). This minimal interaction between the heater and the optical mode of the microdisk resonator contributed to the device’s enhanced performance.

A breakthrough was reported with the use of a graphene heater on a silicon waveguide, achieving a record FOM value of less than $40\mathrm{mW}\mu \mathrm{s}$ ($P_{\pi }=11\mathrm{mW}$ and $\tau =3.5\mu \mathrm{s}$).36 The design included two intermediate layers, HSQ and ${\mathrm{Al}}_2{\mathrm{O}}_3$, positioned between the silicon waveguide and the graphene heater, with a meticulously optimized gap of 240 nm to maximize performance while minimizing optical loss. It is noteworthy that the reported power consumption was characterized at a wavelength of $\lambda =1310\mathrm{nm}$, with potential variations at $\lambda =1550\mathrm{nm}$ due to differences in optical mode confinement.

Beyond graphene, CNTs have been proposed as an alternative for crafting transparent heaters, offering the principal advantage of lower absorption in the near-infrared spectrum. Direct integration of CNTs atop silicon waveguides has been explored for thermo-optic tuning purposes.39 Despite their promising optical properties, a significant limitation of CNTs is their incompatibility with standard CMOS fabrication processes. Moreover, the performance metrics reported, including a power consumption of 14.5 mW and a switching speed of $4.5\mu \mathrm{s}$, do not exhibit marked improvements over analogous devices based on graphene.

Transition-metal dichalcogenides, particularly a single layer of ${\mathrm{MoS}}_2$ (molybdenum disulfide), have shown better prospects as heater materials when positioned in close proximity (30 nm) to the silicon waveguide.40 This configuration yielded an impressively low power consumption of 7.5 mW in a $283\text{-}\mu \mathrm{m}$-long ${\mathrm{MoS}}_2$ microheater, alongside a minimal insertion loss of $\sim 0.42\mathrm{dB}$. However, the relatively slow response time of the phase shifter, around $25\mu \mathrm{s}$, can be attributed to the Schottky contact formed between the ${\mathrm{MoS}}_2$ layer and the Au electrical pads. Future enhancements could potentially be realized by establishing ohmic contacts with low resistance, optimizing the device’s performance further.

The synergy between transparent heaters and the augmentation of light–matter interactions through slow-light phenomena offers a pathway to substantial improvements in the power efficiency and speed of TOPSs. The slow-light effect, facilitated by the elevated group index in photonic crystal waveguides (PhCWs), enhances tuning efficiency dramatically. As a result, switching time under 1 ms and power consumption as low as 2 mW (yielding a FOM of less than $2\mathrm{mW}\mu \mathrm{s}$) have been achieved in ultracompact phase shifters, measuring merely $20\mu \mathrm{m}$ in length, based on a PhCW integrated with a graphene heater.37 The minimal gap of only 11 nm between the heater and the PhCW contributes to this high efficiency, despite the graphene layer, inducing an optical loss of 1.1 dB.

Furthermore, ultracompact device switches can be realized through the development of a photonic crystal cavity (PhCC).38 This innovative approach allows for a switching power, defined as the energy required to transition from a low loss state to a high loss state, to be less than 2 mW, coupled with a switching speed of $\sim 1.5\mu \mathrm{s}$ for a device with a footprint of only $5\mu \mathrm{m}$.

TCO-based microheaters stand out for their CMOS-compatible manufacturing processes and thermo-optical characteristics. A key advantage of TCOs, such as ITO, resides in their capacity to modulate the concentration of mobile electrons within the near-infrared spectrum. This unique property enables these materials to function akin to metals with minimal loss at the operational wavelengths of devices, thus mitigating the optical losses typically associated with metal-based heaters. As a result, the spacer between the silicon waveguide and the heater can be substantially reduced, enhancing power efficiency and switching speed without incurring the significant optical losses characteristic of thinner metal gaps.20 Specifically, a compact ITO/Si TOPS, measuring only $50\mu \mathrm{m}$ in length, demonstrated a power consumption of 9.7 mW and a switching time of $5.2\mu \mathrm{s}$.

Further advancements were achieved with the introduction of a hydrogen-doped indium oxide (IHO) microheater, implemented directly atop the waveguide.41 This $10\text{-}\mu \mathrm{m}$-long IHO heater not only showcased an insertion loss of $\sim 0.5\mathrm{dB}$ but also achieved a submicrosecond switching speed ($0.98\mu \mathrm{s}$) while consuming 9.6 mW. Consequently, this led to an exceptionally low FOM of $9.41\mathrm{mW}\mu \mathrm{s}$.

Doped silicon serves a dual purpose in the topic of TOPSs, acting simultaneously as both the heater resistor and the silicon waveguide. The doping process, which can involve $n$-type or $p$-type dopants such as arsenic (As), boron (B), or phosphorus (P), introduces free carriers into the silicon, leading to inherent optical losses. This effect creates a fundamental trade-off between the resistivity of the heaters and the optical absorption they introduce. To achieve a balance that minimizes optical losses while ensuring resistance values are compatible with electrical drivers and intended applications, silicon is typically doped to a carrier concentration of $\sim {10}^{18}{\mathrm{cm}}^{-3}$. In addition, employing multiple heater resistors in parallel is a common strategy to lower the total resistance, enhancing the device’s compatibility with electrical systems [illustrated in Fig. 4(a)].

It is important to note that doped silicon heaters exhibit specificity toward the silicon photonic platform and may not be directly transferable to other photonic materials such as silicon nitride. Table 3 compiles experimental studies that have utilized doped silicon as the heating element, detailing their main specifications.

Employing doped silicon wires as heaters presents a viable alternative to traditional metallic heaters. Such resistive elements are typically built by doping the edges of a rib waveguide, maintaining a distance of less than $1\mu \mathrm{m}$ from the core to mitigate excessive optical loss, while the central region of the waveguide remains undoped. Consequently, the electrical current flows parallel to the waveguide’s length. This configuration allows for power consumption levels comparable to those of metallic heaters positioned atop the waveguide ($\sim 20\mathrm{mW}$) but offers the advantage of faster switching speeds (ranging from 2 to $5\mu \mathrm{s}$). The enhanced speed is attributable to the reduced distance over which heat must propagate.19^,47

On the other hand, doped silicon waveguides can facilitate even faster switching through direct current injection. This approach enables heat generation directly within the waveguide itself, as depicted in Fig. 4(b), effectively bypassing the limitations associated with heat propagation from external sources. In addition, this approach offers a slight reduction in power consumption compared with parallel heaters adjacent to the silicon waveguide. Rib waveguides, characterized by heavily doped edges and a lightly doped center, are essential for facilitating electrical current injection into the waveguide, as depicted in Fig. 4(c). This doping configuration ensures an optimal overlap between the thermal profile and the optical mode, minimizing the optical loss due to free carriers.

The phase shifter may also be designed as a series of individual resistors in parallel, allowing for customization of the device’s resistance and driving voltage/current by adjusting the number of unit cells independently of its length. Such configurations have achieved insertion losses as low as 0.2 dB, power consumption of around 25 mW, and switching time of $\sim 3\mu \mathrm{s}$.46 Optimizing the waveguide geometry further reduces power consumption without significantly affecting optical loss or switching speed. Notably, power consumption was minimized to 12.7 mW using a compact silicon-doped heater, $\sim 10\mu \mathrm{m}$ in length, integrated directly into the waveguide. An adiabatic bend was employed to minimize optical loss from free-carrier absorption and avoid optical mismatch, thereby preventing undesired reflections or the excitation of higher-order modes.45

Moreover, leveraging the field pattern distribution in MMI devices facilitates achieving low insertion loss, compact footprints, and fast switching. Electrical connections are strategically placed at positions corresponding to field pattern minima within the MMI. A $35\text{-}\mu \mathrm{m}$-long device demonstrated power consumption and switching time of 29 mW and $2\mu \mathrm{s}$, respectively, with a moderate insertion loss of 2 dB.51 Subsequent improvements reduced the insertion loss to below 1 dB by minimizing the number of electrical connections, while the switching speed was enhanced to 500 ns through the incorporation of a thin Al heat sink.52

Integrating a pn junction within a silicon waveguide, as illustrated in Fig. 4(d), enhances the operational stability of TOPSs. The saturated I–V response characteristic of pn junctions serves as a safeguard against thermal runaways by inherently limiting the current flow. Furthermore, the diode-like behavior of the junction facilitates the independent driving of multiple heaters using the same electrical pads.50 This configuration involves two diode heaters arranged in parallel, with the cathode of one heater connected to the anode of the other and vice versa, allowing for selective heating by simply reversing the voltage polarity. Reported configurations demonstrated power consumption of $\sim 21\mathrm{mW}$ and switching speeds nearing $100\mu \mathrm{s}$.50 To decrease the overall resistance and, consequently, the required driving voltage, a total of eight diode heaters were placed in parallel, each $50\mu \mathrm{m}$ in length ($8\mu \mathrm{m}$ p-doped) and $1.2\text{-}\mu \mathrm{m}$ wide, placed $0.75\mu \mathrm{m}$ from the waveguide in the same plane.

To address the inherent challenge of nonlinear phase shift responses to applied voltage in diode heaters, the authors in Ref. 50 developed a linear response technique through the utilization of pulse-width modulation (PWM). By fixing the PWM signal amplitude above the diode heater’s threshold voltage and modulating the signal’s duty cycle, power delivery was linearized and controlled effectively. This diode heater configuration has been successfully applied to manage larger silicon photonic circuits, allowing for the digital control of matrix topologies comprising $N$ rows and $M$ columns by connecting $N\times M$ heaters.53 Employing PWM signals and time-multiplexing across different channels, the system obviates the need for digital-to-analog converters, requiring only $M+N$ wires for comprehensive circuit control. An experimental demonstration controlling a $3\times 5$ matrix with a $1\times 16$ power splitter tree and 15 TOPSs via eight bond pads showcased this concept’s effectiveness.53

For further acceleration of switching time, the pn junction can be directly integrated into the silicon waveguide, enhancing speed to the microsecond range49 or even down to hundreds of nanoseconds.48 However, this direct integration method results in a notable increase in the optical loss for the phase shifter, $\sim 2\mathrm{dB}$.49

Advanced configurations in TOPSs aim to decouple the traditionally correlated lengths of the heater and the light path to enhance energy efficiency. This approach is characterized by extending the light-path length while maintaining the heater’s length constant, thereby facilitating a greater phase shift for the same level of power consumption. The primary limitation of this strategy, however, lies in the requirement for larger device footprints to significantly reduce power consumption.

Folded waveguides provide a straightforward method to extend the waveguide path length. By folding the silicon waveguide multiple time beneath the heater, for example, in a spiral configuration [illustrated in Figs. 5(a) and 5(b)], significant increases in path length can be achieved. Densmore et al.54 reported the fabrication of a waveguide spiral comprising a total of 59 folds. To mitigate coupling, the separation between adjacent waveguides was maintained at $2\mu \mathrm{m}$. A meander Cr/Au heater, separated from the photonic spiral by a $1.5\text{-}\mu \mathrm{m}$-thick ${\mathrm{SiO}}_2$ layer, facilitated a temperature change $\mathrm{\Delta }{T}_{\pi }=0.67°\mathrm{C}$ across an active length of 6.3 mm for the TM polarization, resulting in a power consumption of $\sim 6.5\mathrm{mW}$.54 When compared with a phase shifter employing a straight waveguide, the folded configuration demonstrated a fivefold reduction in power consumption (from 36 mW). The switching time was observed to be $14\mu \mathrm{s}$, constrained by the thickness of the ${\mathrm{SiO}}_2$ cladding surrounding the waveguide. Employing varying widths between adjacent waveguides can further mitigate phase matching and subsequent coupling.55 In addition, releasing the entire phase shifter structure can minimize power consumption to as low as 0.095 mW, albeit at the cost of a prolonged switching time of $\sim 1\mathrm{ms}$ (Table 4).

Additional optimization in folded TOPSs has been achieved through the incorporation of noncircular clothoid bends and the optimization of the heater’s width and position.56 This design facilitates a more efficient harnessing of generated heat. Peripheral waveguides are utilized to recollect residual heat energy, thereby enhancing the efficiency of the phase shifter without resorting to thermal isolation techniques such as air trenches or undercuts. This approach has demonstrated a power consumption of 2.56 mW and a switching speed of $\sim 35\mu \mathrm{s}$. Subsequent research has yielded even higher performance, with a reported power consumption as low as 3 mW and a fast switching time of $11\mu \mathrm{s}$.57 In addition, optical losses in such devices have been minimized to 0.9 dB, achieved by introducing a slight offset at the junction between the bend and straight waveguide segments to mitigate the excitation of higher-order modes.

A recent innovative TOPS configuration relies on a multipass photonic architecture, enhancing the effective path length of light through a mode multiplexing approach. This strategy reduces the power consumption of the phase shifter while preserving high switching speed and, more importantly, broadband operation.58 Indeed, while conventional resonant cavities enhance the effectiveness of phase shifters, this approach comes at the cost of narrowing the optical bandwidth. By contrast, the multipass strategy utilizes spatial mode multiplexing to circulate light multiple times through the phase shifter, with each pass converting the light to a higher-order orthogonal spatial mode. This method increases the effective path length without the need for a resonant cavity. It operates on the premise that the effective refractive indices of higher-order modes exhibit greater sensitivity to temperature changes due to their stronger dispersion. Thus, by integrating a TOPS into this multipass structure, light accumulates significant phase shifts from all passes.

The working principle is illustrated in Fig. 6: light is launched into the multipass structure in the ${\mathrm{TE}}_0$ mode. As detailed in Ref. 58, the light is converted to the ${\mathrm{TE}}_1$ mode upon exiting the multimode waveguide through a mode converter consisting of an adiabatic directional coupler. The ${\mathrm{TE}}_1$ mode then circulates within the multimode waveguide in the opposite direction. Subsequently, light exits the multimode waveguide to be converted into the ${\mathrm{TE}}_2$ mode and is sent back to the multimode waveguide in the forward direction, and the process continues. Ultimately, the fundamental ${\mathrm{TE}}_0$ mode is outputted from the structure.

This design was experimentally realized with a $360\text{-}\mu \mathrm{m}$-long Pt heater placed atop the multimode waveguide and separated by an intermediate $1\text{-}\mu \mathrm{m}$-thick ${\mathrm{SiO}}_2$ layer. The device exhibited a switching time of $6.5\mu \mathrm{s}$. Interestingly, the number of passes does not influence the device’s switching time but does affect power consumption and optical loss. The effective path length—and consequently, the optical loss—increases with the number of passes due to the greater number of adiabatic couplers involved. For a three-pass phase shifter, the power consumption and insertion loss were measured at 4.6 mW and 1.2 dB, respectively. Increasing the passes to seven resulted in reduced power consumption, down to 1.7 mW, albeit with an elevated loss of almost 5 dB.

In addition to leveraging the silicon thermo-optic effect, various mechanisms and technologies have been proposed to address the inherent limitations of TOPSs, including energy consumption, switching speed, and device footprint. Table 5 provides a comprehensive summary of both established and emerging electro-optical phase shifter technologies within the realm of SiPh.

The plasma-dispersion effect in silicon offers a well-established approach for implementing phase shifters. The underlying physical phenomenon is inherently rapid (on the order of hundreds of picoseconds) and can be realized through $n\text{-}/p$-doping of the silicon waveguide, utilizing the same fabrication processes available in microelectronic CMOS foundries.59^,60 In addition, the power consumption associated with such phase shifters is moderately low, typically in the microwatt range. However, these devices face two primary limitations. First, the plasma-dispersion effect alters both the real and imaginary components of the silicon refractive index,61 leading to relatively high optical losses ($>1\mathrm{dB}$) in these phase shifters. Second, the refractive index change induced is minimal (on the order of ${10}^{-5}$), necessitating large device footprints (on the scale of millimeters) to achieve significant phase shifts.62^–67

To mitigate the issue of large footprints, resonant structures such as MRRs have been explored. However, these solutions introduce their own set of challenges, including high sensitivity to external thermal fluctuations and a limited operational bandwidth.68^–73

Over recent decades, silicon MEMS technology has achieved maturity, offering promising avenues for mechanical devices in photonics. MEMS-based phase shifters are known for their low optical loss ($\sim 1\mathrm{dB}$), high energy efficiency, and compact footprints.74^–79 These mechanical devices function by altering the modal cross section of a suspended silicon waveguide through geometrical adjustments, facilitated by a MEM actuator. The application of a voltage bias between the movable shuttle and a fixed, anchored electrode generates an attractive force within the actuator. This force diminishes the gap between the sets of teeth, causing displacement of the free-hanging shuttle. Consequently, a phase shift is achieved due to changes in the effective refractive index of the guided mode, resulting from this geometrical tuning. The induced optical losses are minimal, primarily originating from optical mismatches caused by structural transitions.

The primary challenges associated with MEMS-based phase shifters include their switching speed (ranging from $\sim 0.1$ to 1 MHz), the relatively high driving voltage (exceeding 20 V), and the complexity of fabrication. Although MEMS technology is compatible with microelectronic industry manufacturing standards, the fabrication processes involved are intricate.

The synergistic combination of nonlinear polymers with the high optical confinement afforded by plasmonics presents a promising avenue for the development of highly energy-efficient, ultrafast, and ultracompact phase shifters.80^–83 Nonetheless, a significant challenge of this approach is the very high optical loss, typically exceeding 5 to 10 dB, which stands as a principal limitation. In addition, the reliance on non-CMOS-compatible metals such as Au hinders the mass production of plasmonic devices. The long-term reliability and stability of the organic polymers used also necessitate further investigation.84

To address these challenges, TCOs emerge as promising candidates for new low-loss and CMOS-compatible plasmonic devices.85^–87 Notably, the significant free-carrier dispersion effect of ITO has been exploited to realize subwavelength-long phase shifters capable of subnanosecond switching speeds. This is achieved by electrostatically tuning the ITO carrier concentration close to, but not within, the high-loss epsilon-near-zero plasmonic region.88 Despite these advancements, further optimization is required, as the insertion loss associated with these devices remains substantial ($>5\mathrm{dB}$).

Ferroelectric materials are recognized for their capacity to enable high-performance electro-optic devices by harnessing the Pockels effect. Unlike silicon, which lacks the Pockels effect due to its material symmetry, ferroelectrics offer ultrafast operational speeds (on the order of picoseconds) without contributing to optical loss. In recent years, various platforms have been proposed to utilize these distinctive properties for the development of ferroelectric-based phase shifters, ensuring compatibility with silicon photonic devices. Predominantly, these efforts have centered around lithium niobate (LN), a material with a longstanding history in commercial fiber-based electro-optic modulators.89^,90 Innovations in phase-shifting devices have led to the demonstration of both ultralow loss, ultrafast standalone LN thin films,91 and hybrid LN/Si phase shifters,92 noted for their high energy efficiency (less than pJ).

Alternatively, barium titanate (BTO) has emerged as a ferroelectric material with a Pockels coefficient significantly higher than that of LN (923 versus $\sim 30\mathrm{pm}/\mathrm{V}$),93^,94 paving the way for experimental demonstrations of BTO/Si phase-based devices.95^–100 Recent advancements include the development of a multilevel nonvolatile phase shifter based on BTO/Si.101 The direct growth of BTO on silicon highlights its potential for monolithic integration with electronic circuits and mass manufacturing within silicon photonic platforms. Furthermore, wafer-scale production has also been showcased in standalone LN on insulator102 and LN on silicon nitride through heterogeneous integration.103

PCMs are distinguished by their dramatic optical refractive index change, facilitating the development of photonic devices with ultracompact footprints spanning only a few micrometers. The predominant PCMs utilized in photonics are chalcogenides,104 capable of nonvolatile transitions between amorphous and crystalline states. This attribute may significantly decrease power consumption, as no static power is needed to maintain the material state.105 State switching is typically achieved by locally heating the PCM through photothermal excitation with optical pulses or joule heating via microheaters,104 leading to comparatively slower switching time (on the order of microseconds). Among various chalcogenide compounds, ${\mathrm{Ge}}_2{\mathrm{Sb}}_2{\mathrm{Te}}_5$ (GST) has been extensively used.106 However, GST’s high optical absorption in both material states positions it as an ideal candidate for absorption-based devices such as optical memories107^,108 but limits its use in phase-based devices. Conversely, alloys such as ${\mathrm{Ge}}_2{\mathrm{Sb}}_2{\mathrm{Se}}_4{\mathrm{Te}}_1$ (GSST), ${\mathrm{Sb}}_2{\mathrm{S}}_3$, and ${\mathrm{Sb}}_2{\mathrm{Se}}_3$ show minimal or negligible optical absorption at telecom wavelengths.107^,109^–116 In this regard, ${\mathrm{Sb}}_2{\mathrm{Se}}_3/\mathrm{Si}$ phase shifters have achieved an insertion loss of merely 0.36 dB with phase modulation up to $0.09\pi /\mu \mathrm{m}$.107

However, the long-term reliability and endurance of PCMs in photonics remain challenging, attributed to material property degradation after numerous switching cycles.117 Reversible switching operation up to only ${10}^4$ cycles has been recently demonstrated in a ${\mathrm{Sb}}_2{\mathrm{Se}}_3/\mathrm{Si}$ phase-shifter device.118 Thus, the application of PCMs in phase shifters might be confined to scenarios not demanding extensive cycling over time.

In this review, a comprehensive overview of the current landscape of PIC technology is based on TOPSs. It has examined the most relevant heater technologies and advanced waveguide-heater configurations, highlighting the prevalent use of metallic heaters as the standard in SiPh due to their compatibility with CMOS foundry processes. Despite their widespread adoption, metallic heaters have been criticized for their high power consumption and slow response time. An alternative strategy, involving the release of the silicon waveguide, has been shown to significantly reduce power consumption, albeit at the cost of device speed.

The exploration of transparent materials, such as graphene and TCOs, offers promising avenues for enhancing performance by enabling closer placement of the heater to the waveguide. Nevertheless, the literature on these innovative approaches remains limited, underscoring a need for further investigation, particularly regarding their practical application and integration into the silicon photonic foundry fabrication processes.

Doping the silicon waveguide emerges as a preferable option for phase shifters requiring swift operation and minimal power consumption, as it facilitates internal heat generation within the waveguide. However, this method introduces optical losses due to free carriers. In addition, its application is confined to silicon waveguides, precluding its adoption in other photonic platforms, such as silicon nitride.

Addressing these open questions and challenges is crucial for advancing the field of TOPSs in PICs. Future efforts should aim at demonstrating the practical applications of these technologies and exploring their integration into standard fabrication processes, thereby paving the way for more efficient, faster, and versatile photonic devices.

Advanced waveguide-heater configurations present a promising avenue to augment the capabilities of conventional TOPS schemes. While existing implementations predominantly utilize metal heaters, the exploration of alternative materials, such as those based on transparent heaters, holds the potential to further capitalize on the advantages offered by these configurations. Notably, advanced approaches, including folded waveguides and light recycling, aim at minimizing power consumption without adversely affecting switching speed and optical bandwidth. This contrasts with strategies involving released waveguides, where power efficiency improvements often come at the cost of reduced operational speed.

A critical challenge associated with these advanced configurations is the inverse relationship between power consumption reduction and the TOPS footprint. In scenarios demanding high device density, such as in the deployment of deep-neural networks, the increased footprint could impose significant constraints. Consequently, there is a pressing need for novel strategies that concurrently optimize speed, power efficiency, and device compactness. Such developments would not only overcome existing limitations but also enable broader application of TOPSs in densely packed PICs.

This review also has explored various alternative mechanisms and technologies for phase shifters, each presenting unique advantages, limitations, and potential application scopes. The silicon plasma dispersion effect offers significantly faster operation speeds (lower than nanoseconds) while retaining fabrication compatibility with CMOS foundries. However, this approach incurs moderate insertion losses ($>1\mathrm{dB}$) and necessitates millimeter-scale footprints due to free-carrier effects and the inherently weak modulation mechanism.

Hybrid ferroelectric-SiPh platforms, utilizing materials such as LN or BTO, propose an avenue for ultralow loss ($<1\mathrm{dB}$) phase shifters capable of ultrafast speeds (on the order of picoseconds). Despite these advantages, their millimeter-long footprints may limit their applicability in densely integrated systems.

MEMS-based phase shifters emerge as a compact alternative ($\sim 100\mu \mathrm{m}$), featuring low optical losses and ultralow power consumption (in the nanowatt range). Their operation, predicated on the mechanical displacement of released silicon waveguides via an external electric field, leverages CMOS-compatible fabrication processes. Nonetheless, the slow operational speeds (on the order of microseconds) and the necessity for high voltages, which are incompatible with standard CMOS voltages, pose significant drawbacks.

Plasmonic phase shifters have demonstrated potential for energy-efficient and ultrafast operation within the ultracompact footprints. The primary challenge for plasmonics lies in their very high optical losses ($>5\mathrm{dB}$), constraining scalability and suitability for certain applications, such as quantum optics.

PCMs stand out for applications requiring ultracompact devices or benefiting from nonvolatile phase tuning, offering the advantage of zero static energy consumption. However, the principal challenge for PCMs is ensuring long-term stable operation across numerous switching cycles, a critical requirement for many applications.

In summary, silicon’s relatively high thermo-optic coefficient, alongside the potential for negligible insertion losses, positions thermal tuning as the most versatile and widely applicable approach in the vast array of integrated photonic applications, spanning fields from computing and quantum technologies to artificial intelligence. The choice of TOPS optimization strategy and configuration will inevitably be guided by the specific requirements of each application, considering the inherent trade-offs among power consumption, speed, and ease of fabrication. Consequently, additional research efforts are crucial for overcoming these challenges. Emerging technologies that offer alternative methods for implementing integrated phase shifters within the SiPh platform present a promising avenue for superseding traditional TOPSs. However, the determination of which technology will ultimately be embraced by existing CMOS foundries remains an open question, underscoring the dynamic and evolving nature of this field.

Jorge Parra is a postdoctoral researcher at the Nanophotonics Technology Center, Polytechnic University of Valencia (UPV). He received his BS and MS degrees in telecommunication engineering from UPV in 2016 and 2020, respectively, and his PhD in silicon photonics from UPV in 2022. He is the author of more than 40 journal papers and international conference papers. His current research interests include silicon photonics, phase-change materials, and transparent conducting oxides.

Juan Navarro-Arenas received his BSc degree from the Faculty of Physics in 2014, his MSc degree in photonics in 2015, and his PhD in physics from the University of Valencia, Spain, in 2020. He joined the Nanophotonics Technology Center, UPV, Valencia, in 2021 as a postdoctoral researcher, where he develops high-speed and efficient optoelectronic silicon circuits and systems and their applications (e.g., intelligent information processing) powered by new materials with novel physical effects.

Pablo Sanchis is a full professor at the Universitat Politecnica de Valencia. He received his PhD in photonics from the same university in 2005. His research interests are related to the development of photonic integrated devices and the integration of disruptive materials to enable new functionalities and superior performance. He has authored more than 90 journal papers and more than 165 papers in international conferences.