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Journal of Semiconductors, Volume. 46, Issue 7, 070204(2025)

High-precision ADC design techniques in ISSCC 2025

Bingrui Li1,2, Zongnan Wang1,2, and Xiyuan Tang1,2、*
Author Affiliations
  • 1Institute for Artificial Intelligence, Peking University, Beijing 100871, China
  • 2School of Integrated Circuits, Peking University, Beijing 100871, China
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    [1] N Dolev, M Kramer, B Murmann. A 12-bit, 200-MS/s, 11.5-mW pipeline ADC using a pulsed bucket brigade front-end, C98(2013).

    [2] S Y Huang, Z S Zhang, X Y He et al. A 70dB SNDR 80MHz BW filter-embedded pipeline-SAR ADC achieving 172dB FoMs with progressive conversion and floating-charge-transfer amplifier, 318(2025).

    [3] H Zhao, X H Zhang, Q J Deng et al. A fully dynamic noise-shaping SAR ADC achieving 120dB SNDR and 189dB FoMs in 1kHz BW, 306(2025).

    [4] J H Gao, Y H Luan, S Y Ye et al. A 93.3dB SNDR, 180.4dB FoMs calibration-free noise-shaping pipelined-SAR ADC with cross-stage gain-mismatch-error-shaping technique and negative-R-assisted residue integrator, 310(2025).

    [5] Z N Wang, B R Li, J J Tang et al. A 184.8dB-FoMs 1.6MS/s incremental noise-shaping pipeline ADC with single-amplification-based kT/C noise cancellation technique, 1(2025).

    [6] Z Y Chen, S Y Ye, J H Gao et al. An easy-drive 16MS/s pipelined-SAR ADC using split coarse-fine input-buffer-sampling scheme and fast robust background inter-stage gain calibration, 1(2025).

    [7] Y Zhou, B W Xu, Y Chiu. A 12 bit 160 MS/s two-step SAR ADC with background bit-weight calibration using a time-domain proximity detector. IEEE J Solid State Circuits, 50, 920(2015).

    [8] Y H Luan, X H Xu, J H Gao et al. A 12.2μW 99.6dB-SNDR 184.8dB-FOMs DT zoom PPD ΔΣM with gain-embedded bootstrapped sampler, 308(2025).

    [9] S Y Ye, J J Cui, J H Gao et al. A rail-to-rail 3rd-order noise-shaping SAR ADC achieving 105.4dB SFDR with integrated input buffer using continuous-time correlated level shifting, 314(2025).

    [10] B R Gregoire, U K Moon. An over-60 dB true rail-to-rail performance using correlated level shifting and an opamp with only 30 dB loop gain. IEEE J Solid State Circuits, 43, 2620(2008).

    [11] D T Lin, L Li, S Farahani et al. A flexible 500MHz to 3.6GHz wireless receiver with configurable DT FIR and IIR filter embedded in a 7b 21MS/s SAR ADC. IEEE Custom Integrated Circuits Conference 2010, 1(2010).

    [12] B Murmann. ADC performance survey 1997-2024. [Online] Available. https://github.com/bmurmann/ADC-survey

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    Bingrui Li, Zongnan Wang, Xiyuan Tang. High-precision ADC design techniques in ISSCC 2025[J]. Journal of Semiconductors, 2025, 46(7): 070204

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    Paper Information

    Category: Research Articles

    Received: May. 9, 2025

    Accepted: --

    Published Online: Aug. 27, 2025

    The Author Email: Xiyuan Tang (XYTang)

    DOI:10.1088/1674-4926/25050012

    Topics

    laser devices and laser physics
    Lasers and Laser Optics
    Laser physics
    laser manufacturing
    Instrumentation, Measurement and Metrology