[2] [2] CHEN Y H, KRISHNA T, EMER J S, et al. Eyeriss: an energy-efficient reconfigurable accelerator for deep convolutional neural networks ［J］. IEEE J Sol Sta Circ, 2016, 52(1): 127-138.

[3] [3] YIN S, PENG O, TANG S, et al. A high energy efficient reconfigurable hybrid neural network processor for deep learning applications ［J］. IEEE J Sol Sta Circ, 2018, 53(4): 968-982.

[4] [4] SU T, MARKUS U, THOMAS S, et al. Using error-source switching (ESS) concept to analyze the conducted radio frequency electromagnetic immunity of microcontrollers ［J］. IEEE Trans Electromag Compatib, 2012, 54(3): 634-645.

[5] [5] SAWADA T, TOSHIKAWA T, YOSHIKAWA K, et al. Immunity evaluation of SRAM core using DPI with on-chip diagnosis structures ［C］ // 8th Workshop Electromag Compatib Integr Circ. Dubrovnik, Croatia. 2011: 65-70.

[6] [6] SAWADA T, TAKATA H, NII K, et al. False operation of static random access memory cells under alternating current power supply voltage variation ［J］. Jpn J Appl Phys, 2013, 52(4S): 04CE14.

[7] [7] SAWADA T, YOSHIKAWA K, TAKATA H, et al. An extended direct power injection method for in-place susceptibility characterization of VLSI circuits against electromagnetic interference ［J］. IEEE Trans VLSI Syst, 2015, 23(10): 2347-2351.

[10] [10] MUKHOPADHYAY S, MAHMOODI H, ROY K. Modeling of failure probability and statistical design of SRAM array for yield enhancement in nanoscaled CMOS ［J］. IEEE Trans Comput Aid Des Integr Circ & Syst, 2005, 24(12): 1859-1880.

[11] [11] CHAPPEL J F, SAFWAT G Z. EMI effects and timing design for increased reliability in digital systems ［J］. IEEE Trans Circ & Sys I: Fundam Theo & Appl, 1997, 44(2): 130-142.

[12] [12] ROBINSON M P, FISCHER K, FLINTOFT I D, et al. A simple model of EMI-induced timing jitter in digital circuits, its statistical distribution and its effect on circuit performance ［J］. IEEE Trans Electromag Compatib, 2003, 45(3): 513-519.