Fig. 1. Framework of microwave photonic link and system. (a) Microwave photonic link; (b) microwave photonic system

Fig. 2. SOI microwave photonic transmiting and receiving chip. (a) Scheme and picture of transmiting chip^[10]; (b) scheme and packaged module of receiving chip^[11]

Fig. 3. Hybrid integrated microwave photonic receiving chip and module. (a) LNOI+Si₃N₄^[12]; (b) InP+SOI ^[13]

Fig. 4. Micro-assembled microwave photonic transceiver module^[14]. (a) Internal structure; (b) device picture

Fig. 5. Tunable OEO based on SOI microwave photonic filter chip^[16]

Fig. 6. Miniaturized OEO module based on micro-assembly. (a) Based on InP chip^[18]; (b) based on SOI chip^[19]

Fig. 7. Tunable OEO based on SOI chip and P-T symmetry mode selection^[20]

Fig. 8. Arbitrary signal generation based on pulse signal duplication and TDS. (a) Based on MRR array^[23]; (b) based on splitter^[24]

Fig. 9. Arbitrary signal generation based on SS-WTT. (a) Schematic diagram^[25]; (b) based on tunable MRR array and SS-WTT^[26]

Fig. 10. Optical spectral shaping chip for LCWM signal generation. (a) LC-WBG assisted MZI^[28]; (b) LC-WBG assisted MI^[29]; (c) LC-WBG assisted Sagnac ring^[30]; (d) LGCA-CDC assisted MZI^[31]

Fig. 11. LCWM signal generation based on FDML OEO. (a) Based on tunable MRR filter^[32]; (b) based on tunable MDR filter^[33]

Fig. 12. Microwave photonic filter based on SOI MRR with high Q. (a) Based on Add-Drop MRR constructed by partial multimode SOI waveguide^[41]; (b) based on All-Pass MRR constructed by complete multimode SOI waveguide^[42-43]

Fig. 13. Out of band rejection enhancement of microwave photonic filter. (a) Band-stop filter^[45]; (b) band-pass filter^[48]

Fig. 14. Integrated microwave photonic filter chip. (a) Monolithic integration based on InP^[51]; (b)(c) monolithic integration based on SOI ^[52-53]

Fig. 15. Low loss OSDL chip. (a) SiO₂^[55]; (b) ultra-thin Si₃N₄^[56]; (c) TFLN^[57]; (d) ultra-thin SOI^[59]; (e) standard SOI^[62]; (f) ultra-thick SOI^[63]

Fig. 16. Delay line chip based on tunable MRR. (a) SCISSOR based 8 cascaded MRRs^[70]; (b) SCISSOR based 40 cascaded MRRs ^[71]; (c) 1×8 binary tree framework^[72-74]; (d) 1×16 binary tree framework^[75]; (e) 4×4 binary tree framework^[76]

Fig. 17. Hybrid tunable delay line chip. (a) OSDL cascaded with tunable MRR^[59]; (b) OSDL cascaded with tunable AMZI^[94]; (c) OSDL cascaded with WBG^[95]; (d) OSDL cascaded with GACC^[96]

Fig. 18. Microwave photonic beamforming verification based on multi-channel delay chips. (a) Beam transmission; (b) bean receiving^[100]

Fig. 19. Microwave photonic frequency measurement based on frequency-to-optical power mapping. (a) MRR assisted MZI^{filter[101]; (b) MDR filter[102]}

Fig. 20. Microwave photonic frequency measurement based on frequency-to-microwave power mapping. (a) Si₃N₄ Add-Drop MRR^[105]; (b) SBS effect of As₂S₃ waveguide^[107]; (c) SOI phase shifted waveguide Bragg grating^[108]

Fig. 21. Microwave photonic frequency measurement based on frequency-to-time mapping. (a) Tunable SOI MRR^[110]; (b) SOI MRR with high Q^[111]

Fig. 22. Hybrid integrated microwave photonic frequency measurement chip based on frequency-to-optical power mapping^[112]

Fig. 23. Dual-mode integrated microwave photonic frequency measurement chip based on frequency-to-time and frequency-to-optical power mapping^[113]

Fig. 24. Development process of programmable microwave photonic signal processing chips based on MZI network. (a) Two stage rectangle MZI network^[114]; (b) MZI network comprised by seven hexagons^[115]; (c) microwave photonic signal processing framework based on MZI network chip^[118]; (d) programmable microwave photonic signal processing chip and packaging and control system^[119]

Fig. 25. Programmable microwave photonic signal processing chips. (a) Based on MDR network^[120]; (b) based on MRR network^[121]