Journal of Semiconductors, Volume. 41, Issue 6, 062403(2020)
Variation tolerance for high-speed negative capacitance FinFET SRAM bit cell
Fig. 2. (Color online) The subthreshold swing improved by NC compared to the baseline.
Fig. 4. The simulation flow chart for analysis the performance variation for the 6T SRAM, and the compact model is the BSIM-CMG cooperating L-K equations.
Fig. 5. (Color online) The
Fig. 6. (Color online) (a) Read speed, (b) leakage, (c) SNM, and (d) WM of NC-FinFET SRAM influenced by the thickness of ferroelectric material.
Fig. 7. (Color online) (a) Read speed, (b) leakage, (c) SNM, and (d) WM of NC-FinFET SRAM influenced by the fin number of baseline with fixed FE thickness 3 nm.
Fig. 8. (Color online) (a) Read speed, (b) leakage, (c) SNM, and (d) WM of NC-FinFET SRAM influenced by the channel length of baseline with one fin.
Fig. 9. (Color online) (a) Read speed, (b) leakage, (c) SNM, and (d) WM of NC-FinFET SRAM influenced by temperature with one fin and supply voltage ranges from 0.5 to 0.7 V.
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Yaqian Qian, Shushan Qiao, Rongqiang Yang. Variation tolerance for high-speed negative capacitance FinFET SRAM bit cell[J]. Journal of Semiconductors, 2020, 41(6): 062403
Category: Articles
Received: Aug. 31, 2019
Accepted: --
Published Online: Sep. 10, 2021
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