Fig. 1. The schematic of LNA and the 3D-view of passive devices

Fig. 2. （a） The schematic of the dual-coupling g_m-boosting technique; （b）the equivalent of the balun; （c） the equivalent half-circuit model of conventional source inductive degeneration; and （d） the equivalent half-circuit model of the dual-coupling g_m-boosting technique

Fig. 3. Comparison of simulated G_max for circuits which use the traditional source inductive degeneration （TSID） method and the dual-coupling g_m-boosting （DCGB） technique

Fig. 4. （a） The schematic of the capacitive neutralization and （b） its small signal equivalent model

Fig. 5. The simulated G_max, K_f versus C_p at 90 GHz

Fig. 6. （a）The schematic and （b） its equivalent circuit of the common-gate-shorting technique

Fig. 7. （a） Maximum stable power gain and （b） NF_min of cascode circuit with and without common-gate-shorting technique

Fig. 8. Chip photograph of the fabricated LNA

Fig. 9. The measured S-parameters

Fig. 10. The measured K factor and the measured noise figure

Fig. 11. The measured Gain, output power at 90 GHz