Photonics Research, Volume. 12, Issue 8, 1828(2024)
Integrated photonic fractional convolution accelerator
Fig. 1. A block diagram representation of the proposed discrete fractional convolution operation defined in Eq. (
Fig. 2. Integrated photonic circuit sketch for the proposed DFrFT-based convolution accelerator. The architecture comprises two DFrFT lattices of normalized lengths
Fig. 3. (a) Convolution of the eigenmodes
Fig. 4. Continuous interpolation of the distance function
Fig. 5. (a) Convolution of the eigenmodes
Fig. 6. Convolution norm
Fig. 7. Input signal (black-shaded area) and the corresponding convolution norm using the filter
Fig. 8. Edge detection scheme using the noisy rectangular signal of Fig.
Fig. 9. (a) Propagation of the electric field modulus
Fig. 10. Mean (line) and standard deviation (shaded area) of the relative percent error [
Fig. 11. Distance function (
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Kevin Zelaya, Mohammed-Ali Miri, "Integrated photonic fractional convolution accelerator," Photonics Res. 12, 1828 (2024)
Category: Silicon Photonics
Received: Jan. 3, 2024
Accepted: May. 21, 2024
Published Online: Aug. 2, 2024
The Author Email: Kevin Zelaya (kevin.zelaya@cinvestav.mx)