Fig. 1. Schematic diagram of the principle model, hardware architecture, and application scenarios of integrated photonic Ising machine. (a) Solving process of combinatorial optimization problems; (b) fundamental principles of the Ising model; (c) two typical integrated photonic Ising machine implementation schemes; (d) typical application scenarios of Ising machines

Fig. 2. DOPO based on microresonator^[19]. (a) Conceptual schematic of network of coupled DOPO; (b) microscope image of two-spin DOPO-based Ising chip

Fig. 3. Integrated nanophotonics recurrent Ising sampler based on MZI^[41]

Fig. 4. Experimental schematic of an OEO-based coherent Ising machine^[45]

Fig. 5. Time-domain multiplexed integrated photonic Ising machine scheme. (a) On-chip Ising machine based on lithium niobate electro-optic modulator^[48]; (b) multi-dimensional minimalist photonic processor architecture^[49]

Fig. 6. Schematic diagram of multiple-input multiple-output communication system

Fig. 7. Network structure of RBM

Fig. 8. Experimental validation of noise-injected Ising machine for unsupervised training of RBM^[38]. (a) Comparison of neuron activation probabilities under different sampling methods; (b) pseudolikelihood and prediction accuracy over training iterations for Ising-machine-based and MCMC-based sampling

Fig. 9. Noise-injected optical Ising machine^[38]. (a) Experimental setup of time-multiplexed opto-electronic Ising machine with injected noise; (b) comparison of sampling results between the noise-injected Ising machine and MCMC