High Power Laser and Particle Beams, Volume. 34, Issue 3, 031022(2022)
Predistortion model of klystron based on Field Programmable Gate Array (FPGA)
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Fig. 1. Layout of the linear accelerator of Hefei Infrared Free Electron Laser (IR-FEL)
Fig. 2. Input-to-output characteristic of the amplitude of the klystron
Fig. 5. Schematic of the lookup-table-based klystron predistortion
Fig. 6. Simulation of error between actual input and output curves of klystron and 2048-node direct lookup-table algorithm and 32-node lookup-table with linear interpolation algorithm
Fig. 7. Input to output amplitude curve of klystron (216 kV) before and after predistortion
Fig. 8. Comparison of feedback efficiency with linearization and without linearization
Table 1. Results of FPGA implementation
View tableView in ArticleTable 1. Results of FPGA implementation
algorithm Lin[clk.cyc] logic elements error LUT slice sum Note: Lin is namber of clocks consumed by different algorithms. direct lookup-table 5 881 385 1266 7.40% lookup-table with linear interpolation 7 940 500 1440 7.20%
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Chunjie Xie, Leilei Tang, Yu Liang, Guangyao Feng, Lin Wang, Zeran Zhou. Predistortion model of klystron based on Field Programmable Gate Array (FPGA)[J]. High Power Laser and Particle Beams, 2022, 34(3): 031022
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Received: May. 31, 2021
Accepted: --
Published Online: Mar. 28, 2022
The Author Email: Zeran Zhou (zhouzr@ustc.edu.cn)
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