Complementary inverter is the basic component for integrated logic circuits. A complementary inverter generally requires both p- and n-channel thin-film transistors (TFTs)^[1−4], and the adoption of oxides may further provide merits of low power, simple configuration, and high integration^{[5, 6]}. In previous reports, most of complementary inverters were based on hybrid techniques adopting n-channel oxide TFTs combined with other types of p-channel TFTs, such as p-type organics^{[7, 8]}, p-type carbon nanotubes^[9], p-type Si^[10], p-type WSe₂^[11], and p-type ZnTe^[12]. Only several literatures demonstrated the design of complementary inverters using both n- and p-type oxide TFTs^[13−16]; even so, they are still different oxide semiconductors such as n-type ZnO and p-type SnO^[13], n-type InGaZnO and p-type SnO^[14], and n-type InWO and p-type CuO^[15]. The only reported one with the same oxide semiconductor is the complementary-like inverter based on ambipolar transport in SnO TFTs^[16]. The main reason is the absence of p- and n-type in one oxide with satisfactory performance for TFTs in microelectronics. Undoubtedly, complementary inverters based on full oxide thin-film transistors (TFTs) are very attractive due to the low cost, low-temperature fabrication, and processability in large-area, transparent, and flexible areas. The next challenge to be overcome is to realize complementary inverters using homogeneous oxide semiconductors.

ZnO is a typical third-generation semiconductor with a wide direct band gap of 3.37 eV, having commercial availability of room-temperature thin-film processes and large-area single-crystal ZnO wafers, which is very potential for transparent electronics and flexible electronics in the future. ZnO-based oxide semiconductors have found versatile applications in optoelectronic devices such as thin-film transistors^[17], memristors^[18], and neural synapse devices^[19]. Among various oxide semiconductors, zinc oxide (ZnO) is also the possible candidate for constructing both p-type and n-type channel TFTs in the same material. Al-doped ZnO (ZnO:Al) is the typical n-type ZnO with well controllable conductivity^[20]. Li−N dual-doped ZnO (ZnO:(Li,N)) is the available p-type ZnO with acceptable stability^[21]. However, complementary inverters with full ZnO have been never reported so far. In this work, we will demonstrate the complementary inverter based on both n- and p-type channel ZnO thin-film transistors. We think this work may open the door for the development of oxide complementary inverters in logic circuits for next-generation microelectronics.

Fig. 1 shows the schematic diagram of the complementary inverter with p-type ZnO:(Li,N) and n-type ZnO:Al TFTs. The n⁺⁺-Si wafer (10^-4 Ω∙cm) was used as the substrate, which was also the gate electrode. The 100 nm SiO₂ film was deposited by plasma-enhanced chemical vapor deposition (PECVD), which was used as the dielectric layer. For p-type ZnO:(Li,N) TFTs, the p-type ZnO:(Li,N) film (50 nm) was the channel layer, Au film (150 nm) was the drain and source electrodes, and SiO₂ film (150 nm) on the channel was the protective layer. For n-type ZnO:Al TFTs, the n-type ZnO:Al film (50 nm) was the channel layer, Al film (150 nm) was the drain and source electrodes, and SiO₂ film (150 nm) on the channel was the protective layer. The p-type ZnO:(Li,N) film was grown by pulsed laser deposition (PLD), using the ZnO−Li₂O ceramic target (0.1 at.% Li) at growth temperature of 450 °C under N₂O ambient with working pressure around 10 Pa^[21]. The ZnO:Al film was grown by magnetron sputtering, using the Zn−Al alloy target (1.0 at.% Al) at growth temperature of 400 °C under Ar−O₂ ambient with working pressure around 5 Pa^[20]. Both Au and Al films were deposited by electron beam evaporation. The channel length (L) and width (W) were 100 and 500 μm, respectively for both p- and n-type ZnO TFTs. To form the complementary inverter, the p-type ZnO:(Li,N) TFT and n-type ZnO:Al TFT were connected via the Al electrode (150 nm).

The electrical characteristics of TFTs and complementary inverters were investigated with an Agilent E5270B semiconductor parameter analyzer at room temperature in the dark. The electrical properties of ZnO films were measured with an HL5500PC system using a four-point probe van der Pauw configuration.

Both p-ZnO:(Li,N) and n-ZnO:Al thin films are polycrystalline with c-axis orientation^{[20, 21]}. For ZnO, the introduced Al behaves as a donor producing the n-type conductivity in ZnO:Al^[20], and the Li−N dual-acceptor pair is effective to produce the p-type conductivity in ZnO:(Li,N)^[21]. The typical electrical properties of chosen p-ZnO:(Li,N) and n-ZnO:Al thin films are listed in Table 1, as measured by Hall-effect measurements. The resistivity values are 36.55 Ω∙cm for p-ZnO:(Li,N) film and 1.71 Ω∙cm for n-ZnO:Al film, with a carrier concentration in the 10¹⁷ cm⁻³ range for both cases. The electrical conductivity of both p- and n-type ZnO films are suitable for using as the channel layers.

In ZnO TFTs, Au and Al are used as the drain/source electrodes to form Ohmic contacts on p-ZnO:(Li,N) and n-ZnO:Al channel layers, respectively. Fig. 2(a) exhibits the output characteristics of the n-ZnO:Al TFT. The linear shape at low drain−source voltages (V_DS) means an Ohmic contact at the Al/n-ZnO interface in the transistors. The curves display an evident current saturation at large V_DS. Fig. 2(b) shows the transfer curves of n-ZnO:Al TFT at V_DS = 40 V. The n-type conduction of the ZnO:Al channel is verified. The ON/OFF current (I_ON/I_OFF) ratio is in the 10⁷ order. The field effect mobility (μFE) and threshold voltage (Vth) are derived from the drain current (IDS) versus gate bias (VGS) equation:

1IDS1/2=W2LCiμFE(VGS−Vth)VDS⩾VGS−Vth.

Here, Ci is the capacitance per unit area of the gate insulator (0.023 μF/cm²). The calculated values are μFE = 4.7 cm²/(V∙s) and Vth = 9.5 V. The subthreshold swing (SS) means necessary V_GS to elevate I_DS by one decade, which is calculated by

2SS=(dlog(IDS)dVGS)−1.

The subthreshold swing value is determined to be 0.51 V/decade for the n-ZnO:Al TFT.

Fig. 2(c) exhibits the output characteristics of the p-ZnO:(Li,N) TFT. The Ohmic contact at the Au/p-ZnO interface can also be confirmed by the linearity of curves at low VDS. The curves also display a clear current saturation. Fig. 2(d) depicts the transfer curves of p-ZnO:(Li,N) TFT at VDS = −40 V. The p-type conduction of the ZnO:(Li,N) channel can be firmly confirmed. The I_ON/I_OFF ratio is in the 10⁵ order. The μFE and Vth values are determined to be 0.12 cm²/(V∙s) and −7.3 V, respectively, also as calculated by Eq. (1). The subthreshold swing value is derived from Eq. (2) to be 0.99 V/decade for the p-ZnO:(Li,N) TFT.

The complementary inverter can be depicted by an equivalent circuit diagram (Fig. 1(b)). It is clearly that this logic device configuration has the ability to reduce the patterning processes for rational fabrication. Fig. 3(a) shows the static voltage transfer characteristics (VTC) of our complementary inverters with p- and n-type ZnO TFTs, presenting the relation of output voltage (Vout) verse input voltage (Vin) at different supply voltages (VDD). Based on the VTC curves, the quite sharp transition behavior is evidently observed in the 15−20 V range for digital logics. The noise margin value is generally limited by the steepness of the transition and the switching threshold voltage (VM)^{[1, 8]}. In the VTC curve, the position of VM can be determined by VM = Vin= Vout, which are 22.2, 18.0, and 13.7 V at supply voltages of 20, 30, and 40 V, respectively. The extracted voltage gain is defined as the absolute value of dVout/dVin, which was measured at different supply voltages and is displayed in Fig. 3(b). The voltage gains are 6.62, 9.89, and 13.34 at the VDD values of 20, 30, and 40 V, respectively. In general, a higher supply voltage leads to a higher ratio of high/low levels of output voltage, making the transition behavior sharper, which results in a higher voltage gain. To the best of our knowledges, this is the first time to report the complementary inverters based on ZnO thin-film transistors.

To investigate the uniformity and repeatability of devices, we have produced another complementary inverter based on p- and n-type ZnO TFTs. Fig. 4(a) shows the static VTC curve at VDD = 30 V, and the voltage gain is extracted to be 11.55 (Fig. 4(b)). The similar curve shape and device parameters reveal the reliability of ZnO-based complementary inverters, but the difference of voltage gain values between two devices is obvious, indicating that the consistency is somewhat poor for our proposed inverters. The device was stored in dry air, and we re-measured its VTC behaviors after 30 days (Figs. 4(c) and 4(d)), where the voltage gain is 9.68 at VDD = 30 V. Although the shape of the VTC curve is well maintained, the reduction of voltage gain can be identified clearly. Thus, further study is still necessary to optimize the fabrication processes of ZnO-based complementary inverters, focusing on the enhancement of uniformity and repeatability of devices and the improvement of device behaviors such as dynamic response characteristics and long-term stability. Also, since ZnO:Al and ZnO:(Li,N) are prepared independently, it will be valuable to explore the feasibility of streamlining the preparation procedure to enhance efficiency and reduce complexity.

In summary, we have designed the complementary inverters based on full ZnO thin-film transistors. The p-type ZnO:(Li,N) and n-type ZnO:Al films were used as the channels for fabrication of TFTs. The two kinds of films have both a carrier concentration in the 10¹⁷ cm⁻³, which is suitable for TFT process. The p-ZnO:(Li,N) TFT has a field effect mobility of 0.12 cm²/(V∙s) and the n-ZnO:Al TFT has a field effect mobility of 4.7 cm²/(V∙s). The complementary inverters have been produced from p- and n-type ZnO TFTs, exhibiting a voltage gain up to 13.34 at the supply voltage of 40 V. The complementary inverters based on ZnO TFTs are expected to be promising for oxide logic circuits for next-generation microelectronics.