As conventional image-acquisition systems cannot easily fulfill the demand for rapid transmission of significant data amounts from indirect time-of-flight (I-ToF) image sensors, a high-speed image-acquisition system based on a field-programmable gate array (FPGA) and multilane camera serial interface 2 (CSI-2) is proposed. Based on the CSI-2 protocol, the system adopts a digital physical layer with 12 independent lanes, which can significantly improve the acquisition rate of sensor data. Simultaneously, the system utilizes the short-packet information of the CSI-2 protocol to denote different phase-shift images output by the I-ToF sensor, thus enabling the host computer to reconstruct depth images accurately. In the FPGA design, the low level protocol layer module is designed based on a parallel architecture to process CSI-2 data packets at high speed. Additionally, a parallel first-in first-out (FIFO) structure is adopted to eliminate delays between different data lanes. Experimental results show that the system can support the complete acquisition of I-ToF image sensor data with a 2016 pixel×1096 pixel resolution and 30 frame/s frame rate. In the high-speed burst mode of the CSI-2, the instantaneous bandwidth of the FPGA data acquisition can reach a maximum of 9.600 Gb/s. The depth image reconstructed by the host computer enables distance measurement. Therefore, the image-acquisition system based on FPGA and multilane CSI-2 enables high-speed I-ToF image-sensor data transmission.