Journal of Semiconductors, Volume. 46, Issue 8, 080401(2025)

A RISC-V 32-bit microprocessor on two-dimensional semiconductor platform

Di Zhang1 and Yang Li2、*
Author Affiliations
  • 1School of Information Science and Engineering, University of Jinan, Jinan 250022, China
  • 2School of Integrated Circuits, Shandong University, Jinan 250101, China
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    With the rapid development of information technology, the demand for high-performance and low-power microprocessors continues to grow. Traditional silicon-based semiconductor technologies have encountered numerous bottlenecks in performance enhancement, such as drain-induced barrier lowering, reduced mobility caused by interface scattering, and limited current on/off ratios. These limitations have spurred researchers to seek out new materials. Two-dimensional (2D) semiconductors have emerged as a promising solution due to their atomic thickness, excellent electrical properties, and mechanical flexibility[15]. Despite significant progress in the wafer-scale growth and device fabrication of 2D materials, integrating them into large-scale functional circuits remains a challenge[610]. Recently, Zhou and colleagues achieved a significant breakthrough in this area by successfully developing the RV32-WUJI, a RISC-V 32-bit microprocessor based on 5900 molybdenum disulfide (MoS₂) transistors, demonstrating the great potential of 2D semiconductors in complex circuits. This microprocessor achieved a manufacturing yield of 99.77% and a low power consumption of 0.43 mW at an operating frequency of 1 kHz, showcasing the feasibility and efficiency of 2D semiconductor technology in practical applications (Nat. (2025), https://doi.org/10.1038/s41586-025-08759-9)[11].

    (Color online) (a) Left, 24 WUJI chips on a 4-inch sapphire wafer. Right, a close-up optical image of a 6 mm × 6 mm die with 5900 MoS2 transistors and peripheral I/O pads. (b) Scaled schematic of the RV32-WUJI die’s physical layout, with the bottom layer being MoS2 on sapphire. (c) Transfer curves of the inverter’s 50 load and 50 drive transistors. (d) Static voltage transfer traits of 900 inverters with noise tolerance. (e) Gain value distribution of 50 inverters. SS is subthreshold swing; VTG is top-gate voltage. (f) The 17-stage longest logic gate path has a 171 μs max delay. (g) Upper left shows circuit structures like controlled full adders, 4-input multiplexers, counters, and a 32-bit register. Upper right shows their basic logic functions. (h) Data path schematic through the nine modules[11].

    Figure 1.(Color online) (a) Left, 24 WUJI chips on a 4-inch sapphire wafer. Right, a close-up optical image of a 6 mm × 6 mm die with 5900 MoS2 transistors and peripheral I/O pads. (b) Scaled schematic of the RV32-WUJI die’s physical layout, with the bottom layer being MoS2 on sapphire. (c) Transfer curves of the inverter’s 50 load and 50 drive transistors. (d) Static voltage transfer traits of 900 inverters with noise tolerance. (e) Gain value distribution of 50 inverters. SS is subthreshold swing; VTG is top-gate voltage. (f) The 17-stage longest logic gate path has a 171 μs max delay. (g) Upper left shows circuit structures like controlled full adders, 4-input multiplexers, counters, and a 32-bit register. Upper right shows their basic logic functions. (h) Data path schematic through the nine modules[11].

    In the manufacturing process, the researchers use a 4-inch MoS₂ wafer to successfully fabricate the RV32-WUJI microprocessor. The microprocessor employs a top-gate field-effect transistor (FET) structure that is compatible with mainstream silicon CMOS technology[12]. The manufacturing process includes front-end-of-line (FEOL) and back-end-of-line (BEOL) processes. By employing a systematic co-optimization strategy and machine learning to analyze the impact of each process step on device performance, the researchers achieve a high yield (99.92% for transistors) and low power consumption (0.43 milliwatts at 1 kHz) in the wafer-scale 2D integrated circuit manufacturing. Fig. 1(a) presents the optical microscopic images of the entire wafer and a single RV32-WUJI chip, highlighting the complexity and scale of the manufacturing. Fig. 1(b) clearly illustrates the four-layer structure of the microprocessor, including the source and drain layer (M0), gate layer, logic connection layer (M1), and module connection layers (M2 and M3), clarifying the functions and interconnections of each layer. This four-layer structure is crucial for achieving the high integration density and functionality required for complex microprocessors. The use of a top-gate structure allows for better control over the electrical properties of the MoS2 transistors, which is essential for high-performance digital circuits. Additionally, the researchers optimize the process flow to ensure compatibility with existing CMOS technologies, making the integration of 2D materials more feasible[1315].

    Zhou and colleagues' research not only demonstrates the great potential of 2D semiconductors in large-scale functional circuits but also paves a new way for future high-performance and low-power applications. The successful fabrication of the RV32-WUJI microprocessor proves the feasibility of 2D integrated circuit technology in practical applications. Future research will focus on further optimizing processing technologies and materials to achieve 2D CMOS in short-channel regions, thereby fully unlocking the potential of 2D semiconductors. In addition, researchers will also explore new circuit architectures to meet the needs of emerging application fields such as edge computing and intelligent sensing. This research lays a solid foundation for the application of 2D semiconductors in next-generation computing technologies and heralds the great potential of 2D materials in the post-silicon era. The innovative approach and comprehensive methodology employed in this study provide valuable insights for the continued advancement of 2D semiconductor technology, potentially revolutionizing the future of microelectronics and paving the way for more efficient and sustainable computing solutions.

    In terms of transistor-level matching and logic unit design, the researchers precisely control the threshold voltage (VTH) of load and drive transistors by using different metal gates (aluminum and gold) and high-k dielectric layer deposition optimization. Fig. 1(c) depicts the transfer curves of MoS₂ transistors with different metal gates (Al and Au), highlighting the different VTH, which indicates that the electrical properties of transistors can be effectively regulated by selecting different metal gates. The researchers construct a 30 × 30 array of 900 inverters. Fig. 1(d) shows the transfer characteristic curves of these inverters, with 898 of them functioning properly, achieving a yield of 99.77% and an overall noise tolerance of 0.5 V. Fig. 1(e) shows that these inverters possess high single-stage gain, and their uniformity and high performance lay a solid foundation for advanced digital logic circuits. Fig. 1(f) presents the input−output margin map and delay analysis of the longest path in RV32-WUJI, confirming the design's capability to support a maximum operating frequency of a few kilohertz, indicating that the microprocessor has good performance and stability in low-frequency applications. In terms of microprocessor architecture design, the RV32-WUJI microprocessor was built using an optimized standard cell library, forming a complete functional microprocessor based on the RV32I instruction set. The architecture includes a 1-bit arithmetic logic unit, control status register module, instruction decoding module, immediate number decoding module, and a control module containing the program counter. The chip also features a buffer register module, a small state machine for monitoring instruction execution status, and interface modules for the register file and memory. Fig. 1(g) displays the circuit diagrams and functions of four typical circuits, such as controlled full adders, multiplexers, counters, and 32-bit registers, demonstrating the RV32-WUJI microprocessor's potential in implementing complex digital logic functions. Fig. 1(h) reveals the complete data path and state machine architecture of the RV32-WUJI microprocessor, highlighting its serial processing architecture designed to reduce power consumption and hardware overhead, making it suitable for edge-embedded environments in small internet of things devices.

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    Di Zhang, Yang Li. A RISC-V 32-bit microprocessor on two-dimensional semiconductor platform[J]. Journal of Semiconductors, 2025, 46(8): 080401

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    Paper Information

    Category: Research Articles

    Received: May. 13, 2025

    Accepted: --

    Published Online: Aug. 27, 2025

    The Author Email: Yang Li (YLi)

    DOI:10.1088/1674-4926/25050016

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