In the gate etching process of thin film transistor (TFT), there is a loading effect in the active area (AA area) and fanout area due to the difference in layout density. The etching time is difficult to determine because of the large difference in the etching degree between the two areas. It is urgent to suppress the loading effect in the Gate etching process for quality assurance. The wet etching microprocess was analyzed, and a scheme to increase the etchant spray flow rate to suppress the etch loading effect was proposed. The scheme of increasing flow rate was translated into the adjustment of the etching time ratio of the 3 etching chambers (Etch1~Etch3). The verification of etching with different time ratios of the 3 chambers was performed with the total etching time unchanged, and the etching results were clustered and analyzed. Finally, the time ratio that suppresses the loading effect is preferably selected and the results are analyzed in conjunction with neural network. The results show that the loading effect can be suppressed by decreasing the Etch3 time ratio and increasing the Etch2 time ratio. The time ratio of Etch1~Etch3 is adjusted from 33.33%∶33.33%∶33.33% to 10%∶80%∶10%, and the difference of etching degree between AA and fanout area is decreased from 0.575 μm to 0.317 μm. By adjusting the time ratio among the three etching zones, the etching loading effect can be suppressed to alleviate the difference in etching degree in different areas to meet the TFT mass production requirements.