Fig. 1. Schematic diagram of the fiber Sagnac loop

Fig. 2. Schematic diagram of the on-chip reflector. (a) 3D view; (b) top view and related structure parameter

Fig. 3. Simulated result of the on-chip reflector. (a) MMI light field diagram simulated by FDTD; (b) optical signal power under different ports

Fig. 4. Metallographic micrograph of the high reflectance, low temperature sensitivity on-chip reflector

Fig. 5. Reflective curve of the reflector when there is no temperature change. (a) Experimentally measured reflective curve and its envelope curve; (b) reflective spectrum envelope curve of the reflector

Fig. 6. Reflective spectrum of the reflector when the temperature changes. (a) Reflective curve; (b) wavelength drift of reflection curve; (c) power change of reflective spectrum envelope curve