NUCLEAR TECHNIQUES, Volume. 45, Issue 10, 100401(2022)

Design and verification of data acquisition clock circuit based on dual-loop phase-locked loop

Zhi LIU1, Guodong GAO1,2, Junhui YUE1, Jianshe CAO1,2, Yaoyao DU1, Huizhou MA1, Jun HE1, Qiang YE1, Xuhui TANG1,2, Yukun LI1,2, Jing YANG1,2, and Shujun WEI1,2、*
Author Affiliations
  • 1Institute of High Energy Physics, Chinese Academy of Sciences, Beijing 100049, China
  • 2University of Chinese Academy of Sciences, Beijing 100049, China
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    Zhi LIU, Guodong GAO, Junhui YUE, Jianshe CAO, Yaoyao DU, Huizhou MA, Jun HE, Qiang YE, Xuhui TANG, Yukun LI, Jing YANG, Shujun WEI. Design and verification of data acquisition clock circuit based on dual-loop phase-locked loop[J]. NUCLEAR TECHNIQUES, 2022, 45(10): 100401

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    Paper Information

    Category: Research Articles

    Received: Jun. 6, 2022

    Accepted: --

    Published Online: Nov. 4, 2022

    The Author Email: WEI Shujun (weisj@ihep.ac.cn)

    DOI:10.11889/j.0253-3219.2022.hjs.45.100401

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