Chinese Journal of Quantum Electronics, Volume. 41, Issue 6, 881(2024)
Reliability design of detector array target circuit system
Figures & Tables(14)
Fig. 4. Reliability logic block diagram after redundant design of the circuit system
Table 1. Severity classification
View tableView in ArticleTable 1. Severity classification
Category Impact and consequence of failure Ⅰ(Catastrophic) Catastrophic failure that leads to the destruction of missile, satellite, rocket, spacecraft, or casualty Ⅱ(Lethal) Critical failure that results in a critical loss of system functionality and task failure Ⅲ(Critical) Critical failure that results in a mild loss of system functionality and task delay Ⅳ(Minor) Minor failure that is not sufficient to cause loss of system functionality, but results in reduced system performance and requires unplanned repairs
Table 2. Table of fault occurrence level
View tableView in ArticleTable 2. Table of fault occurrence level
Grade Definition Probability of failure A Often happen The probability of a module failure is greater than 20% of the total failure probability of the array target circuit system B Sometimes happen The probability of a module failure is greater than 10% and less than 20% of the total failure probability of the array target circuit C Occasionally happen The probability of a module failure is greater than 1% and less than 10% of the total failure probability of the array target circuit D Rarely happen The probability of a module failure is greater than 0.1% and less than 1% of the total failure probability of the array target circuit E Very rarely happen The probability of a module failure is less than 0.1% of the total failure probability of the array target circuit
Table 3. Array target circuit system module failure analysis table
View tableView in ArticleTable 3. Array target circuit system module failure analysis table
Name of the failure Primary failure mode Impact of failure Severityclassification Probability level of failure Failure of the acquisition channel module Photodetector failure, amplifier failure, resistance and capacitor failure The corresponding acquisition channel has no output or outputdistortion Ⅳ A Failure of the first-level channel selection module First-level channel selection switch failure, resistance and capacitor failure The corresponding acquisition channel has no output or outputdistortion Ⅳ C Failure of the second-level channel selection module Second-level channel selection switch failure, resistance and capacitor failure The corresponding acquisition channel has no output or outputdistortion Ⅲ D Failure of the main control module Device failure such as FPGA and AD converter The system does not work properly and the task fails Ⅱ C Failure of the power supply module Device failure such as filter and regulator The system does not work properly and the task fails Ⅱ C Failure of the interface module LVDS driver, RS-422 driver and other device failure The system does not work properly and the task fails Ⅱ B
Table 4. Importance of each module
View tableView in ArticleTable 4. Importance of each module
Module name Importance Acquisition channel module 0.002 First-level channel selection module 0.033 Second-level channel selection module 0.500 Main control module 1.000 Power supply module 1.000 Interface module 1.000
Table 5. Complexity of each module
View tableView in ArticleTable 5. Complexity of each module
Module name Complexity Acquisition channel module 0.8787 First-level channel selection module 0.0982 Second-level channel selection module 0.0064 Main control module 0.0102 Power supply module 0.0034 Interface module 0.0031 Total 1.0000
Table 6. Failure rate of each module
View tableView in ArticleTable 6. Failure rate of each module
The name of the failure Failure rate/h Failure of the acquisition channel module 9.33×10-4 Failure of the first-level channel selection module 7.03×10-5 Failure of the second-level channel selection module 4.58×10-6 Failure of the main control module 1.11×10-5 Failure of the power supply module 6.49×10-6 Failure of the interface module 1.14×10-4
Table 7. Reliability of each module
View tableView in ArticleTable 7. Reliability of each module
Module name Reliability Acquisition channel module 0.99534586 First-level channel selection module 0.99964856 Second-level channel selection module 0.99997710 Main control module 0.99994450 Power supply module 0.99996755 Interface module 0.99943016
Table 8. Reliability with considering the importance of each module
View tableView in ArticleTable 8. Reliability with considering the importance of each module
Module name Reliability Acquisition channel module 0.99999069 First-level channel selection module 0.99998840 Second-level channel selection module 0.99998855 Main control module 0.99994450 Power supply module 0.99996755 Interface module 0.99943016
Table 9. Reliability required for each module
View tableView in ArticleTable 9. Reliability required for each module
Module name Reliability Acquisition channel module 0.99991213 First-level channel selection module 0.99999902 Second-level channel selection module 0.99999936 Main control module 0.99999898 Power supply module 0.99999966 Interface module 0.99999969
Table 10. Reliability after redundancy without considering the importance
View tableView in ArticleTable 10. Reliability after redundancy without considering the importance
Module name Reliability Main control module 0.99999999 Power supply module 0.99999999 Interface module 0.99999968
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Lichao YUAN, Fengfu TAN, Zhigang HUANG, Yilun CHENG, Zaihong HOU. Reliability design of detector array target circuit system[J]. Chinese Journal of Quantum Electronics, 2024, 41(6): 881
Paper Information
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Received: Dec. 6, 2022
Accepted: --
Published Online: Jan. 8, 2025
The Author Email: Lichao YUAN (13085045015@qq.com)
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