Fig. 1. Cross-sectional diagram of VCSEL array

Fig. 2. Photograph of VCSEL with bare chip

Fig. 3. Photograph of VCSEL with TO package. (a) Side view; (b) top view

Fig. 4. VCSEL with TO package. (a) Diagram of configuration; (b) equivalent circuit

Fig. 5. Simplified diagram of drive circuit

Fig. 6. Simplified diagram of PCB. (a) Top view; (b) bottom view; (c) side view

Fig. 7. Voltage and current simulation waveforms at both ends of VCSEL with different L_s (C=10 nF, V=90 V)

Fig. 8. Voltage and current simulation waveforms at both ends of VCSEL with different R_s (C=10 nF, V=90 V)

Fig. 9. Pulse waveforms of voltage and current at both ends of VCSEL (C=10 nF, V=90 V). (a) VCSEL with TO package; (b) VCSEL with bare chip

Fig. 10. Optical pulse waveforms of VCSEL with TO package and VCSEL with bare chip (C=10 nF, V=90 V)

Fig. 11. Relationship between peak current and peak voltage for VCSEL with TO package and VCSEL with bare chip

Fig. 12. Comparison of simulated and experimental waveform. (a) VCSEL with TO package; (b) VCSEL with bare chip

Fig. 13. Relationship between peak power of optical pulse and peak current of VCSEL with TO package and VCSEL with bare chip (C=10 nF, V=30--90 V)

Fig. 14. Relationship between power conversion efficiency and peak current of VCSEL with TO package and VCSEL with bare chip (C=10 nF, V=30--90 V)