Fig. 1. (a) Diagram of SiPM output circuit, (b) Transimpedance amplifier, where CD is junction capacitance, CCM and CDIFF are the parasitic common mode capacitance and differential capacitance of Op amp, (c) Voltage feedback amplifier, RSis the load resistance

Fig. 2. Circuit of transimpedance amplifier

Fig. 3. Bode plot with open loop gain curve and noise gain curve

Fig. 4. Noise modelling of transimpedance amplifier

Fig. 5. Circuit of voltage feedback amplifier

Fig. 6. Test of signal response

Fig. 7. Diagram of noise measurement

Fig. 8. Component diagram of the test system

Fig. 9. (a) Standard output signals, (b) Fast output signals