Fig. 1. Energy band diagram of TE mode of photonic crystal

Fig. 2. XOR gate structure

Fig. 3. The steady-state electric field diagrams when the input is logic (a) '00', (b) '01', (c) '10' and (d) '11' respectively

Fig. 4. The normalized power output curves when the input is logic (a) '00', (b) '01', (c) '10' and (d) '11' respectively

Fig. 5. NAND gate structure

Fig. 6. The stable electric field diagram and normalized power curve when the input logic is '00', '10' and '11', respectively. (a)-(c) are electric field diagrams when input logic is (a) '00', (b) '10', and (c) '11'; (d)-(f) are normalized curves when input logic is (d) '00', (e) '10', and (f) '00'