Journal of Optoelectronics · Laser, Volume. 33, Issue 6, 569(2022)

Design of passive H-tree network for on-chip optical interconnection

HUANG Jinyang1, JIANG Lin1、*, and ZHANG Yan2
Author Affiliations
  • 1[in Chinese]
  • 2[in Chinese]
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    Traditional on-chip electrical interconnection has been unable to meet the increasing communication demands of multi-core processing systems.On-chip optical interconnection,which has advantages in terms of delay,energy consumption,and bandwidth,has gradually attracted attention.In order to reduce the hardware overhead of optical network-on-chip (ONoC) and improve the performance of the optical network,this paper proposes a 16-port passive H-tree optical interconnection network based on a microring resonator.The broadband micro-ring resonators is used to design 4 sets of steering optical routers,the use of micro-ring resonators is reduced and port selection is completed,and signals is transmitted to 8-port receiving optical routers and 3-level and 4-level optical switches to meet the contention-free transmission of signals.The experimental results show that compared with passive network structures such as Crossbar,λ〖WTBZ〗-Router,GWOR,LACE,and Light,the passive optical H-tree network only needs 72 microring resonators at the 16×16 array scale.The average network insertion loss is 1.49 dB,which is reduced by 21.5%,10.7%,and 59.7% respectively compared with λ-Router,GWOR,and TAONoC.The average signal-to-noise ratio of each path reaches 17.48 dB,which is compared with λ-Router,GWOR,and Light respectively,increased by 38.5%,36.0%,and 17.1%.

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    HUANG Jinyang, JIANG Lin, ZHANG Yan. Design of passive H-tree network for on-chip optical interconnection[J]. Journal of Optoelectronics · Laser, 2022, 33(6): 569

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    Paper Information

    Received: Dec. 16, 2021

    Accepted: --

    Published Online: Oct. 9, 2024

    The Author Email: JIANG Lin (jianglin@xust.edu.cn)

    DOI:10.16136/j.joel.2022.06.0775

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