Building communication links among multiple users in a scalable and robust way is a key objective in achieving large-scale quantum networks. In a realistic scenario, noise from the coexisting classical light is inevitable and can ultimately disrupt the entanglement. The previous significant fully connected multiuser entanglement distribution experiments are conducted using dark fiber links, and there is no explicit relation between the entanglement degradations induced by classical noise and its error rate. Here, a semiconductor chip with a high figure-of-merit modal overlap is fabricated to directly generate broadband polarization entanglement. The monolithic source maintains the polarization entanglement fidelity of above 96% for 42 nm bandwidth, with a brightness of 1.2 × 107 Hz mW-1. A continuously working quantum entanglement distribution are performed among three users coexisting with classical light. Under finite-key analysis, secure keys are established and images encryption are enabled as well as quantum secret sharing between users. This work paves the way for practical multiparty quantum communication with integrated photonic architecture compatible with real-world fiber optical communication network.

As a typical representative of nanomaterials, carbon nanomaterials have attracted widespread attention in the construction of electronic devices owing to their unique physical and chemical properties, multi-dimensionality, multi-hybridization methods, and excellent electronic properties. Especially in the recent years, memristors based on carbon nanomaterials have flourished in the field of building non-volatile memory devices and neuromorphic applications. In the current work, the preparation methods and structural characteristics of carbon nanomaterials of different dimensions were systematically reviewed. Afterwards, in depth discussion on the structural characteristics and working mechanism of memristors based on carbon nanomaterials of different dimensions was conducted. Finally, the potential applications of carbon-based memristors in logic operations, neural network construction, artificial vision systems, artificial tactile systems, and multimodal perception systems were also introduced. It is believed that this paper will provide guidance for the future development of high-quality information storage, high-performance neuromorphic applications, and high-sensitivity bionic sensing based on carbon-based memristors.

Two-dimensional metal chalcogenides have garnered significant attention as promising candidates for novel neuromorphic synaptic devices due to their exceptional structural and optoelectronic properties. However, achieving large-scale integration and practical applications of synaptic chips has proven to be challenging due to significant hurdles in materials preparation and the absence of effective nanofabrication techniques. In a recent breakthrough, we introduced a revolutionary allopatric defect-modulated Fe7S8@MoS2 synaptic heterostructure, which demonstrated remarkable optoelectronic synaptic response capabilities. Building upon this achievement, our current study takes a step further by presenting a sulfurization-seeding synergetic growth strategy, enabling the large-scale and arrayed preparation of Fe7S8@MoS2 heterostructures. Moreover, a three-dimensional vertical integration technique was developed for the fabrication of arrayed optoelectronic synaptic chips. Notably, we have successfully simulated the visual persistence function of the human eye with the adoption of the arrayed chip. Our synaptic devices exhibit a remarkable ability to replicate the preprocessing functions of the human visual system, resulting in significantly improved noise reduction and image recognition efficiency. This study might mark an important milestone in advancing the field of optoelectronic synaptic devices, which significantly prompts the development of mature integrated visual perception chips.

Detecting microwave signals over a wide frequency range is endowed with numerous advantages as it enables simultaneous transmission of a large amount of informationand access to more spectrum resources. This capability is crucial for applications such as microwave communication, remote sensing and radar. However, conventional microwave receiving systems are limited by amplifiers and band-pass filters that can only operate efficiently in a specific frequency range. Typically, these systems can only process signals within a three-fold frequency range, which limits the data transfer bandwidth of the microwave communication systems. Developing novel atom-integrated microwave sensors, for example, radio-frequency (RF) chip–coupled Rydberg atomic receiver, provides opportunities for a large working bandwidth of microwave sensing at the atomic level. In the current work, an ultra-wide dual-band RF sensing scheme was demonstrated by space-division multiplexing two RF-chip-integrated atomic receiver modules. The system can simultaneously receive dual-band microwave signals that span a frequency range exceeding 6 octaves (300 MHz and 24 GHz). This work paves the way for multi-band microwave reception applications within an ultra-wide range by RF-chip-integrated Rydberg atomic sensor.

Inspired by the structure and principles of the human brain, spike neural networks (SNNs) appear as the latest generation of artificial neural networks, attracting significant and universal attention due to their remarkable low-energy transmission by pulse and powerful capability for large-scale parallel computation. Current research on artificial neural networks gradually change from software simulation into hardware implementation. However, such a process is fraught with challenges. In particular, memristors are highly anticipated hardware candidates owing to their fast-programming speed, low power consumption, and compatibility with the complementary metal–oxide semiconductor (CMOS) technology. In this review, we start from the basic principles of SNNs, and then introduced memristor-based technologies for hardware implementation of SNNs, and further discuss the feasibility of integrating customized algorithm optimization to promote efficient and energy-saving SNN hardware systems. Finally, based on the existing memristor technology, we summarize the current problems and challenges in this field.

Tunneling-based static random-access memory (SRAM) devices have been developed to fulfill the demands of high density and low power, and the performance of SRAMs has also been greatly promoted. However, for a long time, there has not been a silicon based tunneling device with both high peak valley current ratio (PVCR) and practicality, which remains a gap to be filled. Based on the existing work, the current manuscript proposed the concept of a new silicon-based tunneling device, i.e., the silicon cross-coupled gated tunneling diode (Si XTD), which is quite simple in structure and almost completely compatible with mainstream technology. With technology computer aided design (TCAD) simulations, it has been validated that this type of device not only exhibits significant negative-differential-resistance (NDR) behavior with PVCRs up to 106, but also possesses reasonable process margins. Moreover, SPICE simulation showed the great potential of such devices to achieve ultralow-power tunneling-based SRAMs with standby power down to 10-12 W.

With the development of 5G technology and increasing chip integration, traditional active cooling methods struggle to meet the growing thermal demands of chips. Thermoelectric coolers (TECs) have garnered great attention due to their rapid response, significant cooling differentials, strong compatibility, high stability and controllable device dimensions. In this review, starting from the fundamental principles of thermoelectric cooling and device design, high-performance thermoelectric cooling materials are summarized, and the progress of advanced on-chip TECs is comprehensively reviewed. Finally, the paper outlines the challenges and opportunities in TEC design, performance and applications, laying great emphasis on the critical role of thermoelectric cooling in addressing the evolving thermal management requirements in the era of emerging chip technologies.