Tunneling-based static random-access memory (SRAM) devices have been developed to fulfill the demands of high density and low power, and the performance of SRAMs has also been greatly promoted. However, for a long time, there has not been a silicon based tunneling device with both high peak valley current ratio (PVCR) and practicality, which remains a gap to be filled. Based on the existing work, the current manuscript proposed the concept of a new silicon-based tunneling device, i.e., the silicon cross-coupled gated tunneling diode (Si XTD), which is quite simple in structure and almost completely compatible with mainstream technology. With technology computer aided design (TCAD) simulations, it has been validated that this type of device not only exhibits significant negative-differential-resistance (NDR) behavior with PVCRs up to 10⁶, but also possesses reasonable process margins. Moreover, SPICE simulation showed the great potential of such devices to achieve ultralow-power tunneling-based SRAMs with standby power down to 10^-12 W.