Fig. 1. Photo of terahertz Schottky diode chip (a) and monolithic circuit (b)

Fig. 2. Schematic diagram of the overall circuit topology of the 340 GHz mixer

Fig. 3. The 340 GHz mixer simulation result. (a) Simulation result of frequency conversion loss;(b) S₁₁ parameter of local oscillator input port; (c) S₂₂ parameter of RF input port

Fig. 4. Overall circuit diagram of frequency doubler. (a) Simulation model of three-dimensional electromagnetic field;(b) ADS circuit model in frequency doubler

Fig. 5. Efficiency simulation results of (a) 170 GHz and (b) 340 GHz frequency doubler

Fig. 6. Schematic diagram of 340 GHz transmission link

Fig. 7. (a) Output power test curve and (b) photos of 340 GHz frequency doubler lin

Fig. 8. Schematic diagram of the 340 GHz receiving link

Fig. 9. (a) Conversion loss test result of 340 GHz sub-harmonic mixer; (b) Photos of 340 GHz mixer link