Journal of Semiconductors, Volume. 45, Issue 7, 072301(2024)
Implementation of sub-100 nm vertical channel-all-around (CAA) thin-film transistor using thermal atomic layer deposited IGZO channel
Fig. 1. (Color online) (a) The structure of IGZO TET with a CAA structure; (b) the process flow of CAA IGZO TFT fabrication.
Fig. 2. (Color online) Schematic of the growth process of IGZO thin films.
Fig. 3. (Color online) O 1s XPS spectra with deconvoluted sub-peaks of IGZO films with various In2O3 sub-cycles. (a) 311; (b) 411; (c) 511; (d) 611; (e) 911.
Fig. 4. (Color online) Changes of carrier concentration, resistivity and hall mobility for 311, 611, and 911 IGZO films.
Fig. 5. (Color online) (a) Optical microscopic top view of the CAA-TFT structure; (b) schematic front view and (c) cross-sectional TEM image of the CAA-TFT structure; (d) EDS mapping of the elemental distributions of each film layer.
Fig. 6. (Color online) Transfer and output characteristics of (a, d) 311, (b, e) 611, and (c, f) 911 IGZO CAA-TFTs.
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Yuting Chen, Xinlv Duan, Xueli Ma, Peng Yuan, Zhengying Jiao, Yongqing Shen, Liguo Chai, Qingjie Luan, Jinjuan Xiang, Di Geng, Guilei Wang, Chao Zhao. Implementation of sub-100 nm vertical channel-all-around (CAA) thin-film transistor using thermal atomic layer deposited IGZO channel[J]. Journal of Semiconductors, 2024, 45(7): 072301
Category: Articles
Received: Jan. 22, 2024
Accepted: --
Published Online: Jul. 18, 2024
The Author Email: Ma Xueli (XLMa), Xiang Jinjuan (JJXiang), Wang Guilei (GLWang)