Chinese Physics B, Volume. 29, Issue 9, (2020)
Effect of annealing temperature on interfacial and electrical performance of Au–Pt–Ti/HfAlO/InAlAs metal–oxide–semiconductor capacitor
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Fig. 1. (a) Structure diagram of MOS capacitor, and (b) equivalent circuit of the MOS capacitor.
Fig. 3. AFM line scan of HfAlO/InAlAs surfaces of samples annealed at (a) 330 °C, (b) 380 °C, (c) 430 °C, and (d) 480 °C.
Fig. 4. RMS roughness value
Fig. 5. XPS results after annealing processing of (a) As 3d, (b) Hf 4f, (c) Al 2p, (d) In 3d2/5.
Fig. 6. Interfacial oxide content under annealing temperatures of 280, 380, and 480 °C.
Fig. 7. The
Fig. 8. Interfacial state density (
Fig. 9. Leakage current densities of HfAlO/InAlAs MOS-capacitor at different annealing temperatures.
Table 1. Electrical parameters extracted from C–V measurements for HfAlO/InAlAs MOS-capacitor with different annealing temperatures.
View tableView in ArticleTable 1. Electrical parameters extracted from C–V measurements for HfAlO/InAlAs MOS-capacitor with different annealing temperatures.
Annealing temperature/°C Cox/(μF/cm2) EOT/nm εox CFB/(μF/cm2) VFB/V Vth/V 280 0.34 7.30 6.41 0.31 0.01 1.33 330 0.47 5.85 8.00 0.36 0.23 0.97 380 0.59 5.53 8.47 0.37 0.12 1.05 430 0.63 8.92 5.24 0.27 0.21 1.70 480 0.39 8.11 5.77 0.29 0.34 1.76
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He Guan, Cheng-Yu Jiang, Shao-Xi Wang. Effect of annealing temperature on interfacial and electrical performance of Au–Pt–Ti/HfAlO/InAlAs metal–oxide–semiconductor capacitor[J]. Chinese Physics B, 2020, 29(9):
Paper Information
Received: Mar. 12, 2020
Accepted: --
Published Online: Apr. 29, 2021
The Author Email: Guan He (he.guan@nwpu.edu.cn)
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