A 256 Gb/s electronic−photonic monolithically integrated transceiver in 45 nm CMOS

Ang Li; Qianli Ma; Yujun Xie; Yongliang Xiong; Yingjie Ma; Han Liu; Ye Jin; Menghan Yang; Guike Li; Haoran Yin; Minye Zhu; Yang Qu; Peng Wang; Daofa Wang; Wei Li; Liyuan Liu; Nan Qi; Ming Li

doi:10.1088/1674-4926/24050040

Journal of Semiconductors, Volume. 45, Issue 7, 070501(2024)

A 256 Gb/s electronic−photonic monolithically integrated transceiver in 45 nm CMOS

Ang Li^1,3,4、†, Qianli Ma^2,3、†, Yujun Xie^1、†, Yongliang Xiong^2,3, Yingjie Ma^2,3, Han Liu^2,3, Ye Jin^1,3,4, Menghan Yang^1,3,4, Guike Li^2,3, Haoran Yin^2,3, Minye Zhu^2,3, Yang Qu¹, Peng Wang¹, Daofa Wang^1,3,4, Wei Li^1,3,4, Liyuan Liu^2,3, Nan Qi^2,3、*, and Ming Li^1,3,4、**

Author Affiliations

¹Key Laboratory of Optoelectronic Materials and Devices, Institute of Semiconductors, Chinese Academy of Sciences, Beijing 100083, China

²Institute of Semiconductors, Chinese Academy of Sciences, Beijing 100083, China

³Center of Materials Science and Optoelectronics Engineering, University of Chinese Academy of Sciences, Beijing 100190, China

⁴School of Electronic, Electrical and Communication Engineering, University of Chinese Academy of Sciences, Beijing 100049, China

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Figures & Tables(4)

Fig. 1. (Color online) Micrograph of the proposed EPIC and its block diagram.

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Fig. 2. (Color online) Measured optical spectra of the 4-channel transmitter (TX) and receiver (RX) from through port.

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Fig. 3. (Color online) Measured eye diagrams of the 4-channel transmitter (TX) and receiver (RX) working at 64 Gb/s NRZ per channel.

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Table 1. Performance summary and comparison to other works.

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Table 1. Performance summary and comparison to other works.

	Intel JSSC 23-24^{[9, 10]}	AMD ISSCC 23^[11]	Ayar Labs ISSCC 24^[12]	IMEC OE 20^[13]	This work
^a Bandwidth density = Total bandwidth/Area (EIC + PIC).^b Calculate from the chip projected area. ^c Not report.^d Calculate from the data in the article.
Laser band	O	O	O	O	O
Integration approach	Flip-chip	Flip-chip	Monolithic	Wire-bonding	Monolithic
EIC process	28 nm CMOS	7 nm FinFET	45 nm CMOS SOI	55 nm BiCMOS	45 nm CMOS SOI
Data rate per channel (Gb/s)	50 (TX)32 (RX)	50 (RX)	32 (TX)32 (RX)	50 (TX)50 (RX)	64 (TX)64 (RX)
Total bandwidth (Gb/s)	400 (TX)256 (RX)	350 (RX)	256 (TX)256 (RX)	200 (TX)200 (RX)	256 (TX)256 (RX)
TX ER (dB)	5	N/A	5.6	3.2	7
Bandwidth density^a (Tb/(s∙mm²))	0.03 (TX + RX)^b	N/R^c	>1 (TX + RX)	0.02 (TX + RX)^d	0.226 (TX + RX)
Energy efficiency (pJ/b)	2.5 (TX)3.8 (RX)	0.96 (RX)	1.87 (TX)2.09 (RX)	2.0 (TX)2.2 (RX)	1.6 (TX)1.25 (RX)

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Ang Li, Qianli Ma, Yujun Xie, Yongliang Xiong, Yingjie Ma, Han Liu, Ye Jin, Menghan Yang, Guike Li, Haoran Yin, Minye Zhu, Yang Qu, Peng Wang, Daofa Wang, Wei Li, Liyuan Liu, Nan Qi, Ming Li. A 256 Gb/s electronic−photonic monolithically integrated transceiver in 45 nm CMOS[J]. Journal of Semiconductors, 2024, 45(7): 070501

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Paper Information

Category: Articles

Received: May. 25, 2024

Accepted: --

Published Online: Jul. 18, 2024

The Author Email: Qi Nan (NQi), Li Ming (MLi)

DOI:10.1088/1674-4926/24050040

Topics

laser devices and laser physics

Lasers and Laser Optics

Laser physics

laser manufacturing

Instrumentation, Measurement and Metrology