Microelectronics, Volume. 53, Issue 2, 338(2023)

Study on the Correlation Between Single Event Transient and Fin Structure of Nano FinFET

LIU Baojun and CHEN Minghua
Author Affiliations
  • [in Chinese]
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    References(13)

    [1] [1] NILAMANI S, RAMAKRISHNAN V N. Gate and drain SEU sensitivity of sub-20-nm FinFET- and junctionless FinFET-based 6T-SRAM circuits by 3D TCAD simulation [J]. J Comput Elec, 2017, 16: 74-82.

    [2] [2] FANG Y P, OATES A S. Characterization of single bit and multiple cell soft error events in planar and FinFET SRAMs [J]. IEEE Trans Dev Mater Reliab, 2016, 16(2): 132-137.

    [8] [8] Semiconductor Industry Association. International Technology Roadmap for Semiconductors (ITRS) 2013 edition [EB/OL]. http://public.itrs.net, 2013.

    [9] [9] RATHOD S S, SAXENA A K, DASGUPTA S. Electrical performance study of 25 nm Ω-FinFET under the influence of gamma radiation: a 3D simulation [J]. Microelec J, 2011, 42: 165-172.

    [10] [10] QIN J R, CHEN S M, LI D W, et al. Temperature and drain bias dependence of single event transient in 25-nm FinFET technology [J]. Chinese Phys B, 2012, 21(8): 089401.

    [11] [11] ASENOV A, KAYA S, BROWN A R. Intrinsic parameter fluctuations in decananometer MOSFETs introduced by gate line edge roughness [J]. IEEE Trans Elec Dev, 2003, 50(5): 1254-1260.

    [12] [12] PATEL K, LIU T J K, SPANOS C J. Gate line edge roughness model for estimation of FinFET performance variability [J]. IEEE Trans Elec Dev, 2009, 56(12): 3055-3063.

    [13] [13] SEOANE N, INDALECIO G, NAGY D, et al. Impact of cross-sectional shape on 10-nm gate length InGaAs FinFET performance and variability [J]. IEEE Trans Elec Dev, 2018, 65(2): 456-462.

    [14] [14] SAHA R, BHOWMICK B, BAISHYA S. Effect of gate dielectric on electrical parameters due to metal gate WFV in n-channel Si step FinFET [J]. Micro & Nano Lett, 2018, 13(7): 1007-1010.

    [15] [15] SAHA R, BHOWMICK B, BAISHYA S. Si and Ge step-FinFETs: work function variability, optimization and electrical parameters [J]. Superlatt Microstruc, 2017, 107: 5-16.

    [16] [16] KARIMI F, OROUJI A A. Electro-thermal analysis of non-rectangular FinFET and modeling of fin shape effect on thermal resistance [J]. Physica E, 2017, 90: 218-227.

    [17] [17] GAO H W, WANG Y H, CHIANG T K. A quasi-3-D scaling length model for trapezoidal FinFET and its application to subthreshold behavior analysis [J]. IEEE Trans Nanotech, 2017, 16(2): 281-289.

    [19] [19] LIU B J, WEI B, ZHANG S, et al. Modeling and analysis single event crosstalk modeling in multi-lines system [C] // IEEE 4th Advanc Inform Technol, Elec Autom Control Conf. Chengdu, China. 2019: 1928-1932.

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    LIU Baojun, CHEN Minghua. Study on the Correlation Between Single Event Transient and Fin Structure of Nano FinFET[J]. Microelectronics, 2023, 53(2): 338

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    Paper Information

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    Received: May. 30, 2022

    Accepted: --

    Published Online: Dec. 15, 2023

    The Author Email:

    DOI:10.13911/j.cnki.1004-3365.220177

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