Fig. 1. (Color online) (a) A top view of 1 Kb SOT MRAM MUX array observed by an optical microscope. The size of the MUX array is about 1 × 1 mm². (b) The 1 Kb SOT-MRAM MUX array includes a row address decoder, a column address decoder, SOT arrays, and a MUX circuit. (c) A zoom-in SEM image of the MUX array after the MTJ etch process. Each pillar in the SEM image represents an elliptical shape MTJ with CD of 300, 1050 nm for short axis a and long axis b, respectively. (d) The cross-section TEM of a selected MTJ in the array from the fully processed wafer in conjunction with CMOS using common 0.18 μm CMOS process technology node. The SOT-MTJ is integrated between the “Metal 5” and the passivation layer.

Fig. 2. (Color online) (a) The quantile plot of the R_P and R_AP distributions of the 1 Kb SOT-MRAM MUX array. The R_P and R_AP were measured after the SOT-MTJs were set to either the P or AP states under appropriate write bias voltages. The R_P and R_AP were normalized to the average value of the R_P in the 1 Kb MUX array. The arrows indicate the separation gap between the R_P and R_AP statistically. (b) The correlation between the TMR and the R_P. Each dot in the figure indicates one SOT-MTJ. The resistance in horizontal axis of (b) is normalized by the average value of the R_P.

Fig. 3. (Color online) (a) Typical WER curves down to 10⁻⁶ level measured under 100 ns write pulse widths; (b) WER curves down to 10⁻⁴ level were collected from over 70 SOT-MTJs under 100 ns write pulse widths. The positive and negative bias voltages in (a) and (b) correspond to the write AP and P directions respectively. Each point in (a) and (b) represents the write failure rate for devices tested over 1 million cycles under each constant bias voltage.

Fig. 4. (Color online) The temperature dependence of (a) the TMR ratios and (b) switching critical switching densities. (c) The CDF plot of the critical current densities from the data in (b). Blue, red and green box plots/dots represent the values at –40, 25, and 125 °C, respectively. The current densities in (b) and (c) are normalized to the median value of 19 MA/cm² at 25 °C.

Fig. 5. (Color online) Write shmoo plots of the 1 Kb MUX array at different temperatures from −40, 25, and 125 °C, respectively. (a)−(c) are for the P-to-AP direction, and (d)−(f) are for the AP-to-P direction. The shmoo plots show the write failure rates of 1 Kb in the MUX array at each write speed (x-axis) and each write bias voltage (y-axis). The pulse widths vary from 20 to 200 ns and the bias voltages range from 0.2 to 1.8 V, respectively. The write failure rates are presented in color gradient with the scale bar shown on the right: red represents 100% fail and blue represents zero fail.