Fig. 1. Diagram of the DICE memory cell.DICE存储单元电路原理图

Fig. 2. Layout diagram of dual DICE cells and the distribution of four sensitive pairs with “1”.双DICE存储单元交叉布局版图示意图以及存储数据1时DICE单元4组灵敏节点对分布情况

Fig. 3. Schematic of heavy ion tilt 60° incidence along different orientational angle.重离子沿不同方位角倾斜60°入射器件示意图

Fig. 4. 65 nm dual DICE SRAM heavy ion bit SEU cross section versus the effective LET.65 nm SRAM重离子单粒子位翻转截面曲线

Fig. 5. Multiple metal-interconnection layers above the active area in 65 nm SRAM.65 nm DICE SRAM有源区上方多层金属布线层

Fig. 6. LET distribution of secondary particle in silicon with 100 MeV and 200 MeV protons passing through multiple metallization layers: (a) Al interconnection; (b) cu interconnection.100 MeV和200 MeV质子穿过器件多层金属布线层后在硅中产生的次级粒子LET值分布　(a) 铝互联; (b) 铜互联

Fig. 7. Proton single event upset cross section in 65 nm dual DICE SRAM.65 nm双DICE SRAM质子单粒子翻转截面

Fig. 8. The distribution of energy and angle of secondary particle with Z = 13 induced by interaction with multiple metallization layers by 100 MeV protons.100 MeV质子穿过多层金属布线层产生的Z = 27次级粒子能量角度分布