[1] Cheng N, Shen A, Liu Y et al. Multi-rate 25/12.5/10-Gb/s Burst-mode Upstream Transmission based on a 10 G Burst-mode ROSA with Digital Equalization Achieving 20 dB Dynamic Range and Sub-100ns Recovery Time[C], 9333264(2020).

[2] Suga H, Kawanaka T, Yoshima S et al. A simple 25 and 12.5 Gb/s Dual-rate Burst-mode Receiver Compliant with ITU-T G. 9804.3 N1-class[C], Th3G.4(2023).

[3] Jiu L. Vertical and Horizontal Development of Semiconductor Industry[EB/OL]. https://www.eefocus.com/article/1566173.html

[4] Tan C, Huang W, Fan Y et al. A 10/2.5-Gb/s Hyper-supplied CMOS Low-noise Burst-mode TIA with Loud Burst Protection and Gearbox Automatic Offset Cancellation for XGS-PON[C], 9772848(2022).

[5] Chen W Z, Gan R M, Huang S H. A Single-chip 2.5-Gb/s CMOS Burst-mode Optical Receiver[J]. IEEE Transactions on Circuits and Systems I: Regular Papers, 56, 2325-2331(2009).

[6] Rylyakov A, Proesel J, Rylov S et al. A 25 Gb/s Burst-mode Receiver for Low Latency Photonic Switch Networks[C], W3D.2(2015).

[7] Säckinger E[M]. Broadband Circuits for Optical Fiber Communication(2005).

[8] Li D, Geng L, Maloberti F et al. Overcoming the Transimpedance Limit: A Tutorial on Design of Low-Noise TIA[J]. IEEE Transactions on Circuits and Systems II: Express Briefs, 69, 2648-2653(2022).

[9] Lin S H. A 64 GBaud Dual Channel Differential Linear Trans-impedance Amplifier[J]. Study on Optical Communications, 57-63(2023).

[10] Yin X, Put J, Verbrugghe J et al. A 10 Gb/s Burst-mode TIA with On-chip Reset/Lock CM Signaling Detection and Limiting Amplifier with a 75 ns Settling Time[C], 416-418(2012).

[11] Ossieur P, Quadir N A, Porto S et al. A 10 Gb/s Linear Burst-mode Receiver in 0.25 μm SiGe: C BiCMOS[J]. IEEE Journal of Solid-State Circuits, 48, 381-390(2013).

[12] Daneshgar S, Li H, Kim T, Balamurugan G. A 128 Gb/s PAM4 Linear TIA with 12.6 pA/Hz Noise Density in 22 nm FinFET CMOS[C], 135-138(2021).