High threshold voltage enhancement-mode GaN p-FET with Si-rich LPCVD SiN<sub><i>x</i></sub> gate insulator for high hole mobility

Liyang Zhu; Kuangli Chen; Ying Ma; Yong Cai; Chunhua Zhou; Zhaoji Li; Bo Zhang; Qi Zhou

doi:10.1088/1674-4926/44/8/082801

Journal of Semiconductors, Volume. 44, Issue 8, 082801(2023)

High threshold voltage enhancement-mode GaN p-FET with Si-rich LPCVD SiN_x gate insulator for high hole mobility

Liyang Zhu¹, Kuangli Chen¹, Ying Ma², Yong Cai², Chunhua Zhou^1、*, Zhaoji Li¹, Bo Zhang¹, and Qi Zhou^1,3、**

¹State Key Laboratory of Electronic Thin Films and Integrated Devices, University of Electronic Science and Technology of China, Chengdu 610054, China

²Key Laboratory of Nanodevices and Applications, Suzhou Institute of Nano-tech and Nano-bionics, CAS, Suzhou 215123, China

³Institute of Electronic and Information Engineering, University of Electronic Science and Technology of China, Dongguan 523808, China

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Liyang Zhu, Kuangli Chen, Ying Ma, Yong Cai, Chunhua Zhou, Zhaoji Li, Bo Zhang, Qi Zhou. High threshold voltage enhancement-mode GaN p-FET with Si-rich LPCVD SiN_x gate insulator for high hole mobility[J]. Journal of Semiconductors, 2023, 44(8): 082801

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Paper Information

Category: Articles

Received: Jan. 14, 2023

Accepted: --

Published Online: Sep. 21, 2023

The Author Email: Zhou Chunhua (czhou@uestc.edu.cn), Zhou Qi (zhouqi@uestc.edu.cn)

DOI:10.1088/1674-4926/44/8/082801

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